Category: semiconductor Devices

Operational Amplifiers An operational amplifier, or op-amp, is a very high gain differential amplifier with high input impedance and low output impedance. Operational amplifiers are typically used to provide voltage amplitude changes, oscillators, filter circuits, etc. An op-amp may contain a number of differential amplifier stages to achieve a very high voltage gain. This is a high gain differential amplifier using direct coupling between the output and the input. This is suitable for DC as well as AC operations. Operational amplifiers perform numerous electronic functions such as instrumentation devices, signal generators, active filters, etc. besides various mathematical operations. This versatile device is also used in many non–linear applications, such as voltage comparators, Analog–to–digital converters and Digital–to–Analog converters, Logarithmic amplifiers, non–linear function generators, etc. Basic Differential Amplifier The following illustration shows a basic differential amplifier − In the above figure − VDI = differential input VDI = V1 – V2 VDO = differential output VDO = VC1 – VC2 This amplifier amplifies the difference between the two input signals, V1 and V2. Differential voltage gain, $$A_d = frac{V_{DO}}{V_{DI}}$$ and $$A_d = frac{(V_{C1} – V_{C2})}{V_{DI}}$$ As shown in the following figure, basic operational amplifier consists of three stages − Input Stage This is the first stage and has the following characteristics. High CMR (Common Mode Rejection) High input impedance Wide band width Low (DC) input offset These are some significant characteristics for the performance of the operational amplifier. This stage consists of a differential amplifier stage and a transistor is biased so that it acts as a constant current source. The constant current source greatly increases the CMR of the differential amplifier. Following are the two inputs to the differential amplifier − V1 = Non inverting input V2 = Inverting input Intermediate Stage This is the second stage and designed to get better voltage and current gains. The current gain is required to supply sufficient current to drive the output stage, where most of the operational amplifier power is generated. This stage consists of one or more differential amplifiers followed by an emitter follower and a DC level shifting stage. Level shifting circuit enables an amplifier to have two differential inputs with a single output. Vout = +ve when V1 > V2 Vout = -ve when V2 < V1 Vout = 0 when V1 = V2 Output Stage This is the last stage of the op-amp and is designed to have low output impedance. This provides the needed current to drive the load. More or less current will be drawn from the output stage as and when the load varies. Therefore, it is essential that the previous stage operates without being influenced by the output load. This requirement is met by designing this stage so as to have high input impedance and high current gain, however with low output impedance. The operational amplifier has two inputs: Non-inverting input and Inverting input. The above figure shows inverting type of operational amplifier. A signal which is applied at the inverting input terminal is amplified however the output signal is out of phase with the input signal by 180 degrees. A signal applied at the non–inverting input terminal is amplified and the output signal is in phase with the input signal. The op-amp can be connected in large number of circuits to provide various operating characteristics. Learning working make money

Semiconductor Devices – JFET Biasing There are two methods in use for biasing the JFET: Self-Bias Method and Potential Divider Method. In this chapter, we will discuss these two methods in detail. Self-Bias Method The following figure shows the self-bias method of n-channel JFET. The drain current flows through Rs and produces the required bias voltage. Therefore, Rs is the bias resistor. Therefore, voltage across bias resistor, $$V_s = I_{DRS}$$ As we know, gate current is negligibly small, the gate terminal is at DC ground, VG = 0, $$V_{GS} = V_G – V_s = 0 – I_{DRS}$$ Or $V_{GS} = -I_{DRS}$ VGS keeps gate negative w.r.t. to the source. Voltage Divider Method The following figure shows voltage divider method of biasing the JFETs. Here, resistor R1 and R2 form a voltage divider circuit across drain supply voltage (VDD), and it is more or less identical to the one used in transistor biasing. The voltage across R2 provides necessary bias − $$V_2 = V_G = frac{V_{DD}}{R_1 + R_2} times R_2$$ $= V_2 + V_{GS} + I_D + R_S$ Or $V_{GS} = V_2 – I_{DRS}$ The circuit is so designed that VGS is always negative. The operating point can be found using the following formula − $$I_D = frac{V_2 – V_{GS}}{R_S}$$ and $V_{DS} = V_{DD} – I_D(R_D + R_S)$ Learning working make money

Semiconductor Devices – Varactor Diode This is a special P-N junction diode with an inconsistent concentration of impurities in its P-N materials. In a normal PN junction diode, doping impurities are usually dispersed equally throughout the material. Varactor diode doped with a very small quantity of impurities near the junction and impurity concentration increases moving away from the junction. In conventional junction diode, the depletion region is an area which separates the P and N material. The depletion region is developed in the beginning when the junction is initially formed. There are no current carriers in this region and thus the depletion region acts as a dielectric medium or insulator. The P-type material with holes as majority carriers and N type material with electrons as majority carriers now act as charged plates. Thus the diode can be considered as a capacitor with N- and P-type opposite charged plates and the depletion region acts as dielectric. As we know, P and N materials, being semiconductors, are separated by a a depletion region insulator. Diodes which are designed to respond to the capacitance effect under reverse bias are called varactors, varicap diodes, or voltage-variable capacitors. The following figure shows the symbol of Varactor diode. Varactor diodes are normally operated in the reverse bias condition. When the reverse bias increases, the width of the depletion region also increases resulting in less capacitance. This means when reverse bias decreases, a corresponding increase in capacitance can be seen. Thus, diode capacitance varies inversely proportional to the bias voltage. Usually this is not linear. It is operated between zero and the reverse breakdown voltage. The capacitance of Varactor diode is expressed as − $$C_T = Efrac{A}{W_d}$$ CT = Total capacitance of the junction E = Permittivity of the semiconductor material A = Cross-sectional area of the junction Wd = Width of the depletion layer These diodes are variable used in microwave applications. Varactor diodes are also used in resonant circuits where some level of voltage tuning or frequency control is required. This diode is also employed in Automatic Frequency Control (AFC) in FM radio and television receivers. Learning working make money

Configuration of Transistors When a transistor is connected in a circuit, four terminals or leads or legs are required, two both for input and output. As we know that transistors have only 3 terminals, this situation can be overcome by making one of the terminal common for both input and output section. Accordingly, a transistor can be connected in three configurations as follows − Common Base Configuration Common Emitter Configuration Common Collector Configuration Following are some important points to note about transistor operation. A transistor can be operated in three regions namely active, saturation, and cutoff region. A transistor when used in the active region, the base-emitter junction is forward biased and the collector-base junction is reverse biased. A transistor when used in the saturation region, the base-emitter junction is forward biased and the collector-base junction is also forward biased. A transistor when used in the cut-off region, both the base-emitter junction and collector-base junction are reverse biased. Comparison of Transistor Configuration The following table shows the comparison of transistor configuration. Characteristics Common Emitter Common Base Common Collector Current Gain High No Considerable Applications Audio frequency High frequency Impedance matching Input Resistance Low Low Very high Output Resistance High Very high Low Voltage Gain Approx. 500 Approx. 150 Less than 1 Advantages and Disadvantages of Transistors The following table lists the advantages and disadvantages of transistors. Advantages Disadvantages Low source voltage Temperature dependency High voltage gain Lower power dissipation Smaller in size Low input impedance Current Amplification Factor (α) The ratio of change in the collector current to the change in the emitter current at constant collector to base voltage Vcb is known as current amplification factor ‘α’. It can be expressed as $alpha = frac{Delta I_C}{Delta I_B}$ at Constant VCB It is clear that current amplification factor is less than unity and it is inversely proportional to the base current considered that the base is lightly doped and thin. Base Current Amplification Factor (β) It is the ratio of change in collector current to the change in base current. A small variation in base current results in a very large change in collector current. Therefore, the transistor is able to attain current gain. It can be expressed as $$beta = frac{Delta I_C}{Delta I_B}$$ Transistor as an Amplifier The following figure shows that a load resistor (RL) is in series with the collector supply voltage (Vcc). A small voltage change ΔVi between the emitter and the base causes a relatively large emitter-current change ΔIE. We define by the symbol ‘a’ – the fraction of this current change – which is collected and passes through RL. The change in output voltage across the load resistor ΔVo = a’RL ΔIE may be many times the change in input voltage ΔVI. Under these circumstances, the voltage amplification A == VO/ΔVI will be greater than unity and the transistor acts as an amplifier. Learning working make money

Semiconductor Devices – Transistor Biasing Transistors have three sections namely – the emitter, the base, and the collector. The base is much thinner than the emitter, and the collector is comparatively wider than both. The emitter is heavily doped so that it can inject large number of charge carriers for current conduction. The base passes most of the charge carriers to the collector as it is comparatively lightly doped than emitter and the collector. For a proper functioning of the transistor, the emitter-base region must be forward-biased and collector-base region must be reverse-biased. In semiconductor circuits, the source voltage is called as the bias voltage. In order to function, bipolar transistors must have both junctions biased. This condition causes a current to flow through the circuit. The depletion region of the device is reduced and majority current carriers are injected towards the junction. One of the junctions of a transistor must be forward biased and other must be reverse biased when it operates. Working of NPN Transistor As shown in the above figure, the emitter to base junction is forward biased and the collector to base junction is reverse biased. Forward bias on the emitter to base junction causes the electrons to flow from N type emitter towards the bias. This condition formulates the emitter current (IE). While crossing the P-type material, electrons tend to combine with holes, generally very few, and constitute the base current (IB). Rest of the electrons cross the thin depletion region and reach the collector region. This current constitutes collector current (IC). In other words, the emitter current actually flows through the collector circuit. Therefore, it can be considered that the emitter current is the summation of the base and the collector current. It can be expressed as, IE = IB + IC Working of PNP Transistor As shown in the following figure, the emitter to base junction is forward biased and the collector to base junction is reverse biased. Forward bias on the emitter to base junction causes the holes to flow from P type emitter towards the bias. This condition formulates the emitter current (IE). While crossing the N-type material, the electrons tend to combine with electrons, generally very few, and constitute the base current (IB). Rest of the holes cross the thin depletion region and reach the collector region. This current constitutes the collector current (IC). In other words, the emitter current actually flows through the collector circuit. Therefore, it can be considered that the emitter current is the summation of the base and the collector current. It can be expressed as, IE = IB + IC Learning working make money

Semiconductor Devices – Useful Resources The following resources contain additional information on Semiconductor Devices. Please use them to get more in-depth knowledge on this. Useful Video Courses Featured 63 Lectures 9 hours 19 Lectures 4 hours 22 Lectures 6 hours 12 Lectures 2 hours Learning working make money

Semiconductor Devices – Integrator The following figure shows that the feedback component used is a capacitor and the resulting connection is called as an integrator. The virtual-ground equivalent shows that an expression for the voltage between the input and the output can be derived in terms of the current (I), from the input to the output. Recall that virtual ground means we can consider the voltage at the junction of R and XC to be ground (since Vi ≈ 0 V) however no current goes into the ground at that point. The capacitive impedance can be expressed as $$X_C = frac{1}{jwC} = frac{1}{sC}$$ Where s = jw as in the Laplace notation. Solving equation for $V_o/V_i$ yields the following equation $$I = frac{V_1}{R_1} = frac{-V_0}{X_c} = frac{-frac{V_0}{I}}{sC} = frac{V_0}{V_1}$$ $$frac{V_0}{V_1} = frac{-1}{sCR_1}$$ It can be written in the time domain as $$V_o(t) = -frac{1}{RC}int V_1(t)dt$$ Learning working make money

Semiconductor Devices – Oscillators An oscillator is an electronic circuit that generates sinusoidal oscillations known as sinusoidal oscillator. It converts input energy from a DC source into AC output energy of periodic waveform, at a specific frequency and is known amplitude. The characteristic feature of the oscillator is that it maintains its AC output. The following figure shows an amplifier with feedback signal even in the absence of an externally applied input signal. A sinusoidal oscillator is essentially a form of feedback amplifier, where special requirements are placed on the voltage gain Av and the feedback networks β. Consider the feedback amplifier of the above figure, where the feedback voltage Vf = βVO supplies the entire input voltage $V_i = V_f = beta V_0 = A_Vbeta V_i$ (1) $V_i = A_Vbeta V_i$ Or $(1 – A_Vbeta)V_i = 0$ (2) If an output voltage is to be produced, the input voltage cannot be zero. Hence, for Vi to exist, Equation (2) requires that $(1 – A_Vbeta) = 0$ Or $A_Vbeta = 1$ (3) Equation (3) is known as “Barkhausen criterion”, which states two basic requirements for oscillation − The voltage gain around the amplifier and feedback loop, called the loop gain, must be unity, or $A_Vbeta = 1$. The phase shift between $V_i$ and $V_f$, called the loop phase shift, must be zero. If these two conditions are satisfied, the feedback amplifier of the above figure will generate a sinusoidal output waveform consistently. Let us now discuss in detail about some typical oscillator circuits. Phase Shift Oscillator An oscillator circuit that follows the fundamental progress of a feedback circuit is the phase-shift oscillator. A phase-shift oscillator is shown in the following figure. The requirements for oscillation are that the loop gain (βA) should be greater than unity and the phase shift between input and output should be 360o. Feedback is provided from the output of the RC network back to the amplifier input. The op-amp amplifier stage provides an initial 180-degree shift and the RC network introduces an additional amount of phase shift. At a specific frequency, the phase shift introduced by the network is exactly 180 degrees, so the loop will be 360 degrees and the feedback voltage is in phase input voltage. The minimum number of RC stages in the feedback network is three, as each section provides 60 degrees of phase shift. The RC oscillator is ideally suited to the range of audio frequencies, from a few cycles to approximately 100 KHz. At the higher frequencies, the network impedance becomes so low that it may seriously load the amplifier, thereby reducing its voltage gain below the required minimum value, and the oscillations will cease. At low frequencies, the loading effect is not usually a problem and the required large resistance and capacitance values are readily available. Using the basic network analysis, frequency oscillation can be expressed as $$f = frac{1}{2pi RC sqrt{6}}$$ Wien Bridge Oscillator A practical oscillator circuit uses an op-amp and RC bridge circuit, with the oscillator frequency set by the R and C components. The following figure shows a basic version of a Wien bridge oscillator circuit. Note the basic bridge connection. Resistors R1 and R2 and capacitors C1 and C2 form the frequency-adjustment elements, while resistors R3 and R4 form part of the feedback path. In this application, the input voltage (Vi) to the bridge is the amplifier output voltage, and the output voltage (Vo) of the bridge is feedback to the amplifier input. Neglecting the loading effects of the op-amp input and output impedances, the analysis of the bridge circuit results in $$frac{R_3}{R_4} = frac{R_1}{R_2} + frac{C_2}{C_1}$$ and $$f = frac{1}{2 pi sqrt{R_1C_1R_2C_2}}$$ If R1 = R2 = R and C1 = C2 = C, the resulting oscillator frequency is $$f_o = frac{1}{2pi RC}$$ Hartley Oscillator The following figure shows the Hartley oscillator. It is one of the most common RF circuits. It is normally used as the local oscillator in a communication broadcast receiver. The bipolar junction transistor in the common emitter connection is the voltage amplifier and is biased by a universal bias circuit consisting of R1, R2, RE. Emitter bypass capacitor (CE) increases the voltage gain of this single transistor stage. The Radio Frequency Choke (RFC) in the collector circuit acts as an open circuit at the RF frequency and prevents RF energy from entering the power supply. The tank circuit consists of L1, L2, and C. The frequency of oscillations is determined by the value of L1, L2, and C and is determined by the oscillates at the resonant frequency of the LC tank circuit. This resonant frequency is expressed as $$f_o = frac{1}{2pi sqrt{L_TC}}$$ The output signal can be taken from the collector by capacitive coupling, provided that the load is large and the frequency of oscillation is not affected. Piezoelectricity Piezoelectric properties are exhibited by a number of natural crystal substances, of which the most important are quartz, Rochelle salt, and tourmaline. When a sinusoidal voltage is applied across these materials, they vibrate at the applied voltage frequency. On the other hand, when these materials are compressed and placed under mechanical strain to vibrate, they produce an equivalent sinusoidal voltage. Therefore, these materials are called as piezoelectric crystal. Quartz is the most popular piezoelectric crystal. Crystal Oscillator The circuit diagram of the crystal oscillator is shown in the following figure. The crystal here acts as a tuned circuit. The equivalent circuit of a crystal is given below. A crystal oscillator has two resonant frequencies: Series Resonant Frequency and Parallel Resonant Frequency. Series Resonant Frequency $$f_s = frac{1}{2pi sqrt{LC}}$$ Parallel Resonant Frequency $$f_p = frac{1}{2pi sqrt{LC_T}}$$ The two resonant frequencies are almost same, since C/Cm is very small. In the above figure, the crystal is connected to operate in parallel resonant mode. The resistors R1, R2, RE, and transistor together form an amplifier circuit. Resistors R1 and R2 provide a voltage stabilized DC bias. The capacitor (CE) provides AC bypass of the emitter resistor (RE) and the

Field Effect Transistors A Field Effect Transistor (FET) is a three-terminal semiconductor device. Its operation is based on a controlled input voltage. By appearance JFET and bipolar transistors are very similar. However, BJT is a current controlled device and JFET is controlled by input voltage. Most commonly two types of FETs are available. Junction Field Effect Transistor (JFET) Metal Oxide Semiconductor FET (IGFET) Junction Field Effect Transistor The functioning of Junction Field Effect Transistor depends upon the flow of majority carriers (electrons or holes) only. Basically, JFETs consist of an N type or P type silicon bar containing PN junctions at the sides. Following are some important points to remember about FET − Gate − By using diffusion or alloying technique, both sides of N type bar are heavily doped to create PN junction. These doped regions are called gate (G). Source − It is the entry point for majority carriers through which they enter into the semiconductor bar. Drain − It is the exit point for majority carriers through which they leave the semiconductor bar. Channel − It is the area of N type material through which majority carriers pass from the source to drain. There are two types of JFETs commonly used in the field semiconductor devices: N-Channel JFET and P-Channel JFET. N-Channel JFET It has a thin layer of N type material formed on P type substrate. Following figure shows the crystal structure and schematic symbol of an N-channel JFET. Then the gate is formed on top of the N channel with P type material. At the end of the channel and the gate, lead wires are attached and the substrate has no connection. When a DC voltage source is connected to the source and the drain leads of a JFET, maximum current will flow through the channel. The same amount of current will flow from the source and the drain terminals. The amount of channel current flow will be determined by the value of VDD and the internal resistance of the channel. A typical value of source-drain resistance of a JFET is quite a few hundred ohms. It is clear that even when the gate is open full current conduction will take place in the channel. Essentially, the amount of bias voltage applied at ID, controls the flow of current carriers passing through the channel of a JFET. With a small change in gate voltage, JFET can be controlled anywhere between full conduction and cutoff state. P-Channel JFETs It has a thin layer of P type material formed on N type substrate. The following figure shows the crystal structure and schematic symbol of an N-channel JFET. The gate is formed on top of the P channel with N type material. At the end of the channel and the gate, lead wires are attached. Rest of the construction details are similar to that of N- channel JFET. Normally for general operation, the gate terminal is made positive with respect to the source terminal. The size of the P-N junction depletion layer depends upon fluctuations in the values of reverse biased gate voltage. With a small change in gate voltage, JFET can be controlled anywhere between full conduction and cutoff state. Output Characteristics of JFET The output characteristics of JFET are drawn between drain current (ID) and drain source voltage (VDS) at constant gate source voltage (VGS) as shown in the following figure. Initially, the drain current (ID) rises rapidly with drain source voltage (VDS) however suddenly becomes constant at a voltage known as pinch-off voltage (VP). Above pinch-off voltage, the channel width becomes so narrow that it allows very small drain current to pass through it. Therefore, drain current (ID) remains constant above pinch-off voltage. Parameters of JFET The main parameters of JFET are − AC drain resistance (Rd) Transconductance Amplification factor AC drain resistance (Rd) − It is the ratio of change in the drain source voltage (ΔVDS) to the change in drain current (ΔID) at constant gate-source voltage. It can be expressed as, Rd = (ΔVDS)/(ΔID) at Constant VGS Transconductance (gfs) − It is the ratio of change in drain current (ΔID) to the change in gate source voltage (ΔVGS) at constant drain-source voltage. It can be expressed as, gfs = (ΔID)/(ΔVGS) at constant VDS Amplification Factor (u) − It is the ratio of change in drain-source voltage (ΔVDS) to the change in gate source voltage (ΔVGS) constant drain current (ΔID). It can be expressed as, u = (ΔVDS)/(ΔVGS) at constant ID Learning working make money

Semiconductor Devices – MOSFET Metal-oxide semiconductor field-effect transistors, also known as MOSFETs, have greater importance and are a new addition to the FET family. It has a lightly doped P type substrate into which two highly doped N type zones are diffused. A unique feature of this device is its gate construction. Here, the gate is completely insulated from the channel. When voltage is applied to the gate, it will develop an electrostatic charge. At this point of time, no current is allowed to flow in the gate region of the device. Also, the gate is an area of the device, which is coated with metal. Generally, silicon dioxide is used as an insulating material between the gate and the channel. Due to this reason, it is also known as insulated gate FET. There are two MOSFETS widely used i) Depletion MOSFET ii) Enhancement MOSFET. D MOSFET The following figures show n-channel D-MOSFET and the symbol. The gate forms a capacitor with gate as one plate, and the other plate is the channel with SiO2 layer as dielectric. When the gate voltage varies, the electric field of the capacitor changes, which in turn varies the resistance of the n-channel. In this case, we can either apply positive or negative voltage to the gate. When MOSFET is operated with negative gate voltage, it is called depletion mode and when operated with positive gate voltage it is called as enhancement mode of operation of MOSFET. Depletion Mode The following figure shows an n-channel D-MOSFET under depletion mode of operation. Its operation is as follows − Most electrons are available on the gate as the gate is negative and it repels the electrons of n channel. This action leaves positive ions in the part of the channel. In other words, some of the free electrons of the n channel are depleted. As a result, less number of electrons are available for current conduction through the n channel. The greater the negative voltage at the gate, less is the current from the source to the drain. Thus, we can change the resistance of the n channel and the current from the source to the drain by varying the negative voltage on the gate. Enhancement Mode The following figure shows n channel D MOSFET under enhancement mode of operation. Here, the gate acts as a capacitor. However, in this case the gate is positive. It provokes the electrons in the n channel and the number of electrons increases in the n channel. A positive gate voltage enhances or increases conductivity of the channel. The larger the positive voltage on the gate, greater the conduction from the source to the drain. Thus, we can change the resistance of the n channel and the current from the source to the drain by varying the positive voltage on the gate. Transfer Characteristics of D – MOSFET The following figure shows transfer characteristics of D-MOSFET. When VGS goes negative, ID falls below the value of IDSS, till it reaches zero and VGS = VGS (off) (Depletion mode). When VGS is zero, ID = IDSS because the gate and the source terminals are shorted. ID increases above the value of IDSS, when VGS is positive and the MOSFET is in enhancement mode. Learning working make money