Category: microprocessor

Microprocessor – 8086 Instruction Sets ”; Previous Next The 8086 microprocessor supports 8 types of instructions − Data Transfer Instructions Arithmetic Instructions Bit Manipulation Instructions String Instructions Program Execution Transfer Instructions (Branch & Loop Instructions) Processor Control Instructions Iteration Control Instructions Interrupt Instructions Let us now discuss these instruction sets in detail. Data Transfer Instructions These instructions are used to transfer the data from the source operand to the destination operand. Following are the list of instructions under this group − Instruction to transfer a word MOV − Used to copy the byte or word from the provided source to the provided destination. PPUSH − Used to put a word at the top of the stack. POP − Used to get a word from the top of the stack to the provided location. PUSHA − Used to put all the registers into the stack. POPA − Used to get words from the stack to all registers. XCHG − Used to exchange the data from two locations. XLAT − Used to translate a byte in AL using a table in the memory. Instructions for input and output port transfer IN − Used to read a byte or word from the provided port to the accumulator. OUT − Used to send out a byte or word from the accumulator to the provided port. Instructions to transfer the address LEA − Used to load the address of operand into the provided register. LDS − Used to load DS register and other provided register from the memory LES − Used to load ES register and other provided register from the memory. Instructions to transfer flag registers LAHF − Used to load AH with the low byte of the flag register. SAHF − Used to store AH register to low byte of the flag register. PUSHF − Used to copy the flag register at the top of the stack. POPF − Used to copy a word at the top of the stack to the flag register. Arithmetic Instructions These instructions are used to perform arithmetic operations like addition, subtraction, multiplication, division, etc. Following is the list of instructions under this group − Instructions to perform addition ADD − Used to add the provided byte to byte/word to word. ADC − Used to add with carry. INC − Used to increment the provided byte/word by 1. AAA − Used to adjust ASCII after addition. DAA − Used to adjust the decimal after the addition/subtraction operation. Instructions to perform subtraction SUB − Used to subtract the byte from byte/word from word. SBB − Used to perform subtraction with borrow. DEC − Used to decrement the provided byte/word by 1. NPG − Used to negate each bit of the provided byte/word and add 1/2’s complement. CMP − Used to compare 2 provided byte/word. AAS − Used to adjust ASCII codes after subtraction. DAS − Used to adjust decimal after subtraction. Instruction to perform multiplication MUL − Used to multiply unsigned byte by byte/word by word. IMUL − Used to multiply signed byte by byte/word by word. AAM − Used to adjust ASCII codes after multiplication. Instructions to perform division DIV − Used to divide the unsigned word by byte or unsigned double word by word. IDIV − Used to divide the signed word by byte or signed double word by word. AAD − Used to adjust ASCII codes after division. CBW − Used to fill the upper byte of the word with the copies of sign bit of the lower byte. CWD − Used to fill the upper word of the double word with the sign bit of the lower word. Bit Manipulation Instructions These instructions are used to perform operations where data bits are involved, i.e. operations like logical, shift, etc. Following is the list of instructions under this group − Instructions to perform logical operation NOT − Used to invert each bit of a byte or word. AND − Used for adding each bit in a byte/word with the corresponding bit in another byte/word. OR − Used to multiply each bit in a byte/word with the corresponding bit in another byte/word. XOR − Used to perform Exclusive-OR operation over each bit in a byte/word with the corresponding bit in another byte/word. TEST − Used to add operands to update flags, without affecting operands. Instructions to perform shift operations SHL/SAL − Used to shift bits of a byte/word towards left and put zero(S) in LSBs. SHR − Used to shift bits of a byte/word towards the right and put zero(S) in MSBs. SAR − Used to shift bits of a byte/word towards the right and copy the old MSB into the new MSB. Instructions to perform rotate operations ROL − Used to rotate bits of byte/word towards the left, i.e. MSB to LSB and to Carry Flag [CF]. ROR − Used to rotate bits of byte/word towards the right, i.e. LSB to MSB and to Carry Flag [CF]. RCR − Used to rotate bits of byte/word towards the right, i.e. LSB to CF and CF to MSB. RCL − Used to rotate bits of byte/word towards the left, i.e. MSB to CF and CF to LSB. String Instructions String is a group of bytes/words and their memory is always allocated in a sequential order. Following is the list of instructions under this group − REP − Used to repeat the given instruction till CX ≠ 0. REPE/REPZ − Used to repeat the given instruction until CX = 0 or zero flag ZF = 1. REPNE/REPNZ − Used to repeat the given instruction until CX = 0 or zero flag ZF = 1. MOVS/MOVSB/MOVSW − Used to move the byte/word from one string to another. COMS/COMPSB/COMPSW − Used to compare two string bytes/words. INS/INSB/INSW − Used as an input string/byte/word from the I/O port to the provided memory location. OUTS/OUTSB/OUTSW − Used as an output string/byte/word from the provided memory location to the I/O port. SCAS/SCASB/SCASW − Used to scan a string and compare

Microprocessor – 8085 Architecture ”; Previous Next 8085 is pronounced as “eighty-eighty-five” microprocessor. It is an 8-bit microprocessor designed by Intel in 1977 using NMOS technology. It has the following configuration − 8-bit data bus 16-bit address bus, which can address upto 64KB A 16-bit program counter A 16-bit stack pointer Six 8-bit registers arranged in pairs: BC, DE, HL Requires +5V supply to operate at 3.2 MHZ single phase clock It is used in washing machines, microwave ovens, mobile phones, etc. 8085 Microprocessor – Functional Units 8085 consists of the following functional units − Accumulator It is an 8-bit register used to perform arithmetic, logical, I/O & LOAD/STORE operations. It is connected to internal data bus & ALU. Arithmetic and logic unit As the name suggests, it performs arithmetic and logical operations like Addition, Subtraction, AND, OR, etc. on 8-bit data. General purpose register There are 6 general purpose registers in 8085 processor, i.e. B, C, D, E, H & L. Each register can hold 8-bit data. These registers can work in pair to hold 16-bit data and their pairing combination is like B-C, D-E & H-L. Program counter It is a 16-bit register used to store the memory address location of the next instruction to be executed. Microprocessor increments the program whenever an instruction is being executed, so that the program counter points to the memory address of the next instruction that is going to be executed. Stack pointer It is also a 16-bit register works like stack, which is always incremented/decremented by 2 during push & pop operations. Temporary register It is an 8-bit register, which holds the temporary data of arithmetic and logical operations. Flag register It is an 8-bit register having five 1-bit flip-flops, which holds either 0 or 1 depending upon the result stored in the accumulator. These are the set of 5 flip-flops − Sign (S) Zero (Z) Auxiliary Carry (AC) Parity (P) Carry (C) Its bit position is shown in the following table − D7 D6 D5 D4 D3 D2 D1 D0 S Z AC P CY Instruction register and decoder It is an 8-bit register. When an instruction is fetched from memory then it is stored in the Instruction register. Instruction decoder decodes the information present in the Instruction register. Timing and control unit It provides timing and control signal to the microprocessor to perform operations. Following are the timing and control signals, which control external and internal circuits − Control Signals: READY, RD’, WR’, ALE Status Signals: S0, S1, IO/M’ DMA Signals: HOLD, HLDA RESET Signals: RESET IN, RESET OUT Interrupt control As the name suggests it controls the interrupts during a process. When a microprocessor is executing a main program and whenever an interrupt occurs, the microprocessor shifts the control from the main program to process the incoming request. After the request is completed, the control goes back to the main program. There are 5 interrupt signals in 8085 microprocessor: INTR, RST 7.5, RST 6.5, RST 5.5, TRAP. Serial Input/output control It controls the serial data communication by using these two instructions: SID (Serial input data) and SOD (Serial output data). Address buffer and address-data buffer The content stored in the stack pointer and program counter is loaded into the address buffer and address-data buffer to communicate with the CPU. The memory and I/O chips are connected to these buses; the CPU can exchange the desired data with the memory and I/O chips. Address bus and data bus Data bus carries the data to be stored. It is bidirectional, whereas address bus carries the location to where it should be stored and it is unidirectional. It is used to transfer the data & Address I/O devices. 8085 Architecture We have tried to depict the architecture of 8085 with this following image − Print Page Previous Next Advertisements ”;

Intel 8253 – Programmable Interval Timer ”; Previous Next The Intel 8253 and 8254 are Programmable Interval Timers (PTIs) designed for microprocessors to perform timing and counting functions using three 16-bit registers. Each counter has 2 input pins, i.e. Clock & Gate, and 1 pin for “OUT” output. To operate a counter, a 16-bit count is loaded in its register. On command, it begins to decrement the count until it reaches 0, then it generates a pulse that can be used to interrupt the CPU. Difference between 8253 and 8254 The following table differentiates the features of 8253 and 8254 − 8253 8254 Its operating frequency is 0 – 2.6 MHz Its operating frequency is 0 – 10 MHz It uses N-MOS technology It uses H-MOS technology Read-Back command is not available Read-Back command is available Reads and writes of the same counter cannot be interleaved. Reads and writes of the same counter can be interleaved. Features of 8253 / 54 The most prominent features of 8253/54 are as follows − It has three independent 16-bit down counters. It can handle inputs from DC to 10 MHz. These three counters can be programmed for either binary or BCD count. It is compatible with almost all microprocessors. 8254 has a powerful command called READ BACK command, which allows the user to check the count value, the programmed mode, the current mode, and the current status of the counter. 8254 Architecture The architecture of 8254 looks as follows − 8254 Pin Description Here is the pin diagram of 8254 − In the above figure, there are three counters, a data bus buffer, Read/Write control logic, and a control register. Each counter has two input signals – CLOCK & GATE, and one output signal – OUT. Data Bus Buffer It is a tri-state, bi-directional, 8-bit buffer, which is used to interface the 8253/54 to the system data bus. It has three basic functions − Programming the modes of 8253/54. Loading the count registers. Reading the count values. Read/Write Logic It includes 5 signals, i.e. RD, WR, CS, and the address lines A0 & A1. In the peripheral I/O mode, the RD and WR signals are connected to IOR and IOW, respectively. In the memorymapped I/O mode, these are connected to MEMR and MEMW. Address lines A0 & A1 of the CPU are connected to lines A0 and A1 of the 8253/54, and CS is tied to a decoded address. The control word register and counters are selected according to the signals on lines A0 & A1. A1 A0 Result 0 0 Counter 0 0 1 Counter 1 1 0 Counter 2 1 1 Control Word Register X X No Selection Control Word Register This register is accessed when lines A0 & A1 are at logic 1. It is used to write a command word, which specifies the counter to be used, its mode, and either a read or write operation. Following table shows the result for various control inputs. A1 A0 RD WR CS Result 0 0 1 0 0 Write Counter 0 0 1 1 0 0 Write Counter 1 1 0 1 0 0 Write Counter 2 1 1 1 0 0 Write Control Word 0 0 0 1 0 Read Counter 0 0 1 0 1 0 Read Counter 1 1 0 0 1 0 Read Counter 2 1 1 0 1 0 No operation X X 1 1 0 No operation X X X X 1 No operation Counters Each counter consists of a single, 16 bit-down counter, which can be operated in either binary or BCD. Its input and output is configured by the selection of modes stored in the control word register. The programmer can read the contents of any of the three counters without disturbing the actual count in process. Print Page Previous Next Advertisements ”;

Microprocessor – Useful Resources ”; Previous Next The following resources contain additional information on Microprocessor. Please use them to get more in-depth knowledge on this topic. Useful Video Courses Microprocessor 8085 Online Training 51 Lectures 6.5 hours Tutorialspoint More Detail Computer Fundamentals Online Training 47 Lectures 2.5 hours Tutorialspoint More Detail Embedded C Programming For Beginners 24 Lectures 2 hours Smart Logic Academy More Detail Embedded Systems with Mbed™ C on STM32 (Arm® Cortex M4) 41 Lectures 5 hours Rahul Shrivastava More Detail Computers, microprocessors and networking 6 Lectures 3 hours Hiba Albateh More Detail Print Page Previous Next Advertisements ”;

Microprocessor – 8086 Addressing Modes ”; Previous Next The different ways in which a source operand is denoted in an instruction is known as addressing modes. There are 8 different addressing modes in 8086 programming − Immediate addressing mode The addressing mode in which the data operand is a part of the instruction itself is known as immediate addressing mode. Example MOV CX, 4929 H, ADD AX, 2387 H, MOV AL, FFH Register addressing mode It means that the register is the source of an operand for an instruction. Example MOV CX, AX ; copies the contents of the 16-bit AX register into ; the 16-bit CX register), ADD BX, AX Direct addressing mode The addressing mode in which the effective address of the memory location is written directly in the instruction. Example MOV AX, [1592H], MOV AL, [0300H] Register indirect addressing mode This addressing mode allows data to be addressed at any memory location through an offset address held in any of the following registers: BP, BX, DI & SI. Example MOV AX, [BX] ; Suppose the register BX contains 4895H, then the contents ; 4895H are moved to AX ADD CX, {BX} Based addressing mode In this addressing mode, the offset address of the operand is given by the sum of contents of the BX/BP registers and 8-bit/16-bit displacement. Example MOV DX, [BX+04], ADD CL, [BX+08] Indexed addressing mode In this addressing mode, the operands offset address is found by adding the contents of SI or DI register and 8-bit/16-bit displacements. Example MOV BX, [SI+16], ADD AL, [DI+16] Based-index addressing mode In this addressing mode, the offset address of the operand is computed by summing the base register to the contents of an Index register. Example ADD CX, [AX+SI], MOV AX, [AX+DI] Based indexed with displacement mode In this addressing mode, the operands offset is computed by adding the base register contents. An Index registers contents and 8 or 16-bit displacement. Example MOV AX, [BX+DI+08], ADD CX, [BX+SI+16] Print Page Previous Next Advertisements ”;

Microcontrollers – 8051 Architecture ”; Previous Next 8051 microcontroller is designed by Intel in 1981. It is an 8-bit microcontroller. It is built with 40 pins DIP (dual inline package), 4kb of ROM storage and 128 bytes of RAM storage, 2 16-bit timers. It consists of are four parallel 8-bit ports, which are programmable as well as addressable as per the requirement. An on-chip crystal oscillator is integrated in the microcontroller having crystal frequency of 12 MHz. Let us now discuss the architecture of 8051 Microcontroller. In the following diagram, the system bus connects all the support devices to the CPU. The system bus consists of an 8-bit data bus, a 16-bit address bus and bus control signals. All other devices like program memory, ports, data memory, serial interface, interrupt control, timers, and the CPU are all interfaced together through the system bus. Print Page Previous Next Advertisements ”;

8279 – Programmable Keyboard ”; Previous Next 8279 programmable keyboard/display controller is designed by Intel that interfaces a keyboard with the CPU. The keyboard first scans the keyboard and identifies if any key has been pressed. It then sends their relative response of the pressed key to the CPU and vice-a-versa. How Many Ways the Keyboard is Interfaced with the CPU? The Keyboard can be interfaced either in the interrupt or the polled mode. In the Interrupt mode, the processor is requested service only if any key is pressed, otherwise the CPU will continue with its main task. In the Polled mode, the CPU periodically reads an internal flag of 8279 to check whether any key is pressed or not with key pressure. How Does 8279 Keyboard Work? The keyboard consists of maximum 64 keys, which are interfaced with the CPU by using the key-codes. These key-codes are de-bounced and stored in an 8-byte FIFORAM, which can be accessed by the CPU. If more than 8 characters are entered in the FIFO, then it means more than eight keys are pressed at a time. This is when the overrun status is set. If a FIFO contains a valid key entry, then the CPU is interrupted in an interrupt mode else the CPU checks the status in polling to read the entry. Once the CPU reads a key entry, then FIFO is updated, and the key entry is pushed out of the FIFO to generate space for new entries. Architecture and Description I/O Control and Data Buffer This unit controls the flow of data through the microprocessor. It is enabled only when D is low. Its data buffer interfaces the external bus of the system with the internal bus of the microprocessor. The pins A0, RD, and WR are used for command, status or data read/write operations. Control and Timing Register and Timing Control This unit contains registers to store the keyboard, display modes, and other operations as programmed by the CPU. The timing and control unit handles the timings for the operation of the circuit. Scan Counter It has two modes i.e. Encoded mode and Decoded mode. In the encoded mode, the counter provides the binary count that is to be externally decoded to provide the scan lines for the keyboard and display. In the decoded scan mode, the counter internally decodes the least significant 2 bits and provides a decoded 1 out of 4 scan on SL0-SL3. Return Buffers, Keyboard Debounce, and Control This unit first scans the key closure row-wise, if found then the keyboard debounce unit debounces the key entry. In case, the same key is detected, then the code of that key is directly transferred to the sensor RAM along with SHIFT & CONTROL key status. FIFO/Sensor RAM and Status Logic This unit acts as 8-byte first-in-first-out (FIFO) RAM where the key code of every pressed key is entered into the RAM as per their sequence. The status logic generates an interrupt request after each FIFO read operation till the FIFO gets empty. In the scanned sensor matrix mode, this unit acts as sensor RAM where its each row is loaded with the status of their corresponding row of sensors into the matrix. When the sensor changes its state, the IRQ line changes to high and interrupts the CPU. Display Address Registers and Display RAM This unit consists of display address registers which holds the addresses of the word currently read/written by the CPU to/from the display RAM. 8279 − Pin Description The following figure shows the pin diagram of 8279 − Data Bus Lines, DB0 – DB7 These are 8 bidirectional data bus lines used to transfer the data to/from the CPU. CLK The clock input is used to generate internal timings required by the microprocessor. RESET As the name suggests this pin is used to reset the microprocessor. CS Chip Select When this pin is set to low, it allows read/write operations, else this pin should be set to high. A0 This pin indicates the transfer of command/status information. When it is low, it indicates the transfer of data. RD, WR This Read/Write pin enables the data buffer to send/receive data over the data bus. IRQ This interrupt output line goes high when there is data in the FIFO sensor RAM. The interrupt line goes low with each FIFO RAM read operation. However, if the FIFO RAM further contains any key-code entry to be read by the CPU, this pin again goes high to generate an interrupt to the CPU. Vss, Vcc These are the ground and power supply lines of the microprocessor. SL0 − SL3 These are the scan lines used to scan the keyboard matrix and display the digits. These lines can be programmed as encoded or decoded, using the mode control register. RL0 − RL7 These are the Return Lines which are connected to one terminal of keys, while the other terminal of the keys is connected to the decoded scan lines. These lines are set to 0 when any key is pressed. SHIFT The Shift input line status is stored along with every key code in FIFO in the scanned keyboard mode. Till it is pulled low with a key closure, it is pulled up internally to keep it high CNTL/STB – CONTROL/STROBED I/P Mode In the keyboard mode, this line is used as a control input and stored in FIFO on a key closure. The line is a strobe line that enters the data into FIFO RAM, in the strobed input mode. It has an internal pull up. The line is pulled down with a key closure. BD It stands for blank display. It is used to blank the display during digit switching. OUTA0 – OUTA3 and OUTB0 – OUTB3 These are the output ports for two 16×4 or one 16×8 internal display refresh registers. The data from these lines is synchronized with the scan lines to scan the display and the keyboard. Operational Modes

Microprocessor – 8257 DMA Controller ”; Previous Next DMA stands for Direct Memory Access. It is designed by Intel to transfer data at the fastest rate. It allows the device to transfer the data directly to/from memory without any interference of the CPU. Using a DMA controller, the device requests the CPU to hold its data, address and control bus, so the device is free to transfer data directly to/from the memory. The DMA data transfer is initiated only after receiving HLDA signal from the CPU. How DMA Operations are Performed? Following is the sequence of operations performed by a DMA − Initially, when any device has to send data between the device and the memory, the device has to send DMA request (DRQ) to DMA controller. The DMA controller sends Hold request (HRQ) to the CPU and waits for the CPU to assert the HLDA. Then the microprocessor tri-states all the data bus, address bus, and control bus. The CPU leaves the control over bus and acknowledges the HOLD request through HLDA signal. Now the CPU is in HOLD state and the DMA controller has to manage the operations over buses between the CPU, memory, and I/O devices. Features of 8257 Here is a list of some of the prominent features of 8257 − It has four channels which can be used over four I/O devices. Each channel has 16-bit address and 14-bit counter. Each channel can transfer data up to 64kb. Each channel can be programmed independently. Each channel can perform read transfer, write transfer and verify transfer operations. It generates MARK signal to the peripheral device that 128 bytes have been transferred. It requires a single phase clock. Its frequency ranges from 250Hz to 3MHz. It operates in 2 modes, i.e., Master mode and Slave mode. 8257 Architecture The following image shows the architecture of 8257 − 8257 Pin Description The following image shows the pin diagram of a 8257 DMA controller − DRQ0−DRQ3 These are the four individual channel DMA request inputs, which are used by the peripheral devices for using DMA services. When the fixed priority mode is selected, then DRQ0 has the highest priority and DRQ3 has the lowest priority among them. DACKo − DACK3 These are the active-low DMA acknowledge lines, which updates the requesting peripheral about the status of their request by the CPU. These lines can also act as strobe lines for the requesting devices. Do − D7 These are bidirectional, data lines which are used to interface the system bus with the internal data bus of DMA controller. In the Slave mode, it carries command words to 8257 and status word from 8257. In the master mode, these lines are used to send higher byte of the generated address to the latch. This address is further latched using ADSTB signal. IOR It is an active-low bidirectional tri-state input line, which is used by the CPU to read internal registers of 8257 in the Slave mode. In the master mode, it is used to read data from the peripheral devices during a memory write cycle. IOW It is an active low bi-direction tri-state line, which is used to load the contents of the data bus to the 8-bit mode register or upper/lower byte of a 16-bit DMA address register or terminal count register. In the master mode, it is used to load the data to the peripheral devices during DMA memory read cycle. CLK It is a clock frequency signal which is required for the internal operation of 8257. RESET This signal is used to RESET the DMA controller by disabling all the DMA channels. Ao – A3 These are the four least significant address lines. In the slave mode, they act as an input, which selects one of the registers to be read or written. In the master mode, they are the four least significant memory address output lines generated by 8257. CS It is an active-low chip select line. In the Slave mode, it enables the read/write operations to/from 8257. In the master mode, it disables the read/write operations to/from 8257. A4 – A7 These are the higher nibble of the lower byte address generated by DMA in the master mode. READY It is an active-high asynchronous input signal, which makes DMA ready by inserting wait states. HRQ This signal is used to receive the hold request signal from the output device. In the slave mode, it is connected with a DRQ input line 8257. In Master mode, it is connected with HOLD input of the CPU. HLDA It is the hold acknowledgement signal which indicates the DMA controller that the bus has been granted to the requesting peripheral by the CPU when it is set to 1. MEMR It is the low memory read signal, which is used to read the data from the addressed memory locations during DMA read cycles. MEMW It is the active-low three state signal which is used to write the data to the addressed memory location during DMA write operation. ADST This signal is used to convert the higher byte of the memory address generated by the DMA controller into the latches. AEN This signal is used to disable the address bus/data bus. TC It stands for ‘Terminal Count’, which indicates the present DMA cycle to the present peripheral devices. MARK The mark will be activated after each 128 cycles or integral multiples of it from the beginning. It indicates the current DMA cycle is the 128th cycle since the previous MARK output to the selected peripheral device. Vcc It is the power signal which is required for the operation of the circuit. Print Page Previous Next Advertisements ”;

Microprocessor – 8086 Pin Configuration ”; Previous Next 8086 was the first 16-bit microprocessor available in 40-pin DIP (Dual Inline Package) chip. Let us now discuss in detail the pin configuration of a 8086 Microprocessor. 8086 Pin Diagram Here is the pin diagram of 8086 microprocessor − Let us now discuss the signals in detail − Power supply and frequency signals It uses 5V DC supply at VCC pin 40, and uses ground at VSS pin 1 and 20 for its operation. Clock signal Clock signal is provided through Pin-19. It provides timing to the processor for operations. Its frequency is different for different versions, i.e. 5MHz, 8MHz and 10MHz. Address/data bus AD0-AD15. These are 16 address/data bus. AD0-AD7 carries low order byte data and AD8AD15 carries higher order byte data. During the first clock cycle, it carries 16-bit address and after that it carries 16-bit data. Address/status bus A16-A19/S3-S6. These are the 4 address/status buses. During the first clock cycle, it carries 4-bit address and later it carries status signals. S7/BHE BHE stands for Bus High Enable. It is available at pin 34 and used to indicate the transfer of data using data bus D8-D15. This signal is low during the first clock cycle, thereafter it is active. Read($overline{RD}$) It is available at pin 32 and is used to read signal for Read operation. Ready It is available at pin 22. It is an acknowledgement signal from I/O devices that data is transferred. It is an active high signal. When it is high, it indicates that the device is ready to transfer data. When it is low, it indicates wait state. RESET It is available at pin 21 and is used to restart the execution. It causes the processor to immediately terminate its present activity. This signal is active high for the first 4 clock cycles to RESET the microprocessor. INTR It is available at pin 18. It is an interrupt request signal, which is sampled during the last clock cycle of each instruction to determine if the processor considered this as an interrupt or not. NMI It stands for non-maskable interrupt and is available at pin 17. It is an edge triggered input, which causes an interrupt request to the microprocessor. $overline{TEST}$ This signal is like wait state and is available at pin 23. When this signal is high, then the processor has to wait for IDLE state, else the execution continues. MN/$overline{MX}$ It stands for Minimum/Maximum and is available at pin 33. It indicates what mode the processor is to operate in; when it is high, it works in the minimum mode and vice-aversa. INTA It is an interrupt acknowledgement signal and id available at pin 24. When the microprocessor receives this signal, it acknowledges the interrupt. ALE It stands for address enable latch and is available at pin 25. A positive pulse is generated each time the processor begins any operation. This signal indicates the availability of a valid address on the address/data lines. DEN It stands for Data Enable and is available at pin 26. It is used to enable Transreceiver 8286. The transreceiver is a device used to separate data from the address/data bus. DT/R It stands for Data Transmit/Receive signal and is available at pin 27. It decides the direction of data flow through the transreceiver. When it is high, data is transmitted out and vice-a-versa. M/IO This signal is used to distinguish between memory and I/O operations. When it is high, it indicates I/O operation and when it is low indicates the memory operation. It is available at pin 28. WR It stands for write signal and is available at pin 29. It is used to write the data into the memory or the output device depending on the status of M/IO signal. HLDA It stands for Hold Acknowledgement signal and is available at pin 30. This signal acknowledges the HOLD signal. HOLD This signal indicates to the processor that external devices are requesting to access the address/data buses. It is available at pin 31. QS1 and QS0 These are queue status signals and are available at pin 24 and 25. These signals provide the status of instruction queue. Their conditions are shown in the following table − QS0 QS1 Status 0 0 No operation 0 1 First byte of opcode from the queue 1 0 Empty the queue 1 1 Subsequent byte from the queue S0, S1, S2 These are the status signals that provide the status of operation, which is used by the Bus Controller 8288 to generate memory & I/O control signals. These are available at pin 26, 27, and 28. Following is the table showing their status − S2 S1 S0 Status 0 0 0 Interrupt acknowledgement 0 0 1 I/O Read 0 1 0 I/O Write 0 1 1 Halt 1 0 0 Opcode fetch 1 0 1 Memory read 1 1 0 Memory write 1 1 1 Passive LOCK When this signal is active, it indicates to the other processors not to ask the CPU to leave the system bus. It is activated using the LOCK prefix on any instruction and is available at pin 29. RQ/GT1 and RQ/GT0 These are the Request/Grant signals used by the other processors requesting the CPU to release the system bus. When the signal is received by CPU, then it sends acknowledgment. RQ/GT0 has a higher priority than RQ/GT1. Print Page Previous Next Advertisements ”;

Microprocessor Tutorial PDF Version Quick Guide Resources Job Search Discussion A microprocessor is a controlling unit of a micro-computer, fabricated on a small chip capable of performing Arithmetic Logical Unit (ALU) operations and communicating with the other devices connected to it. In this tutorial, we will discuss the architecture, pin diagram and other key concepts of microprocessors. Audience This tutorial is designed for all those readers pursing either Bachelor’s or Master’s degree in Computer Science. It will help them understand the basic concepts related to Microprocessors. Prerequisites In this tutorial, all the topics have been explained from elementary level. Therefore, a beginner can understand this tutorial very easily. However if you have a prior knowledge of computer architecture in general, then it will be quite easy to grasp the concepts explained here. Frequently Asked Questions about Microprocessor There are some very Frequently Asked Questions(FAQ) about Microprocessor, this section tries to answer them briefly. What is microprocessor? A microprocessor is like the brain of a computer. It is a small electronic chip that performs the basic calculations and controls the flow of information within the computer. Think of it as the engine that drives the computer”s operations. The microprocessor receives instructions from software programs, processes them, and then executes tasks such as running applications, performing calculations, and managing input and output devices like keyboards and monitors. It is the central component that enables a computer to function and carry out tasks. Who invented the microprocessor? Microprocessor was invented by a team of engineers led by Ted Hoff, Federico Faggin, and Stan Mazor at Intel Corporation in the early 1970s. They developed the first commercially available microprocessor, the Intel 4004, which was introduced in 1971. What are the features of microprocessor? The features of a microprocessor include − Processing Power − Microprocessors are capable of performing millions or even billions of calculations per second, enabling them to execute complex tasks quickly. Versatility − Microprocessors can execute a wide range of instructions and tasks, making them suitable for various applications, from simple household appliances to advanced computers. Integration − Microprocessors integrate multiple components, such as arithmetic logic units (ALUs), control units, and memory, onto a single chip, reducing size and complexity while increasing efficiency. Scalability − Microprocessors come in different configurations and speeds, allowing them to be modified to the specific needs of different devices and applications. Power Efficiency − Modern microprocessors are designed to operate efficiently while consuming minimal power, making them suitable for battery-powered devices like smartphones and laptops. Interconnectivity − Microprocessors can communicate with other components and devices through input/output ports, enabling them to interact with external sensors, displays, and storage devices. Which is the world”s first microprocessor? The world”s first microprocessor is the Intel 4004. It was invented by a team of engineers at Intel Corporation, led by Federico Faggin, Ted Hoff, and Stanley Mazor, and introduced in 1971. The Intel 4004 was a groundbreaking invention because it combined the functions of multiple transistors onto a single chip, making it the first complete central processing unit (CPU) on a microchip. This innovation paved the way for the development of modern computers and electronic devices, as it allowed for smaller, faster, and more efficient computing capabilities. How Does a Microprocessor Work? A microprocessor works like the brain of a computer. It receives instructions from software programs, processes them, and executes tasks to perform various functions. Following is the basic overview of how it works − Fetch − The microprocessor fetches instructions from the computer”s memory, which are stored as binary code (0s and 1s). Decode − It decodes these instructions to understand what action needs to be performed. Execute − The microprocessor carries out the instructions by performing calculations, moving data around, or interacting with other components. Writeback − After executing the instruction, the microprocessor may write the result back to memory or output it to an external device. This process repeats continuously, allowing the microprocessor to handle complex tasks and run software programs, ultimately enabling the computer to perform various functions and operations. Why Registers Are Used Inside of Microprocessors? Registers are used inside microprocessors to store and manage data temporarily while the microprocessor performs calculations and executes instructions. Think of registers as small storage spaces within the microprocessor where data can be quickly accessed and manipulated. They are much faster to access than the computer”s main memory, allowing the microprocessor to work more efficiently. Registers are used to hold operands for arithmetic and logical operations, store memory addresses for accessing data, and keep track of the current state of the microprocessor during program execution. What is flag in microprocessor? A flag in a microprocessor is a small piece of information or a signal that indicates a specific condition or state of the microprocessor during the execution of a program. Flags are used to keep track of various conditions or events that occur during the processing of instructions. For example, flags may indicate whether a certain arithmetic operation resulted in a carry or overflow, whether a comparison between two values was true or false, or whether a certain condition has been met. These flags are stored in special registers within the microprocessor and are used by the microprocessor to make decisions and control the flow of the program. What are the different types of microprocessor? There are primarily two types of microprocessors − General-Purpose Microprocessors − These are versatile microprocessors designed to handle a wide range of tasks and applications. They are commonly found in personal computers, laptops, and servers. General-purpose microprocessors are capable of executing various types of software programs, from word processing and web browsing to gaming and multimedia applications. Examples include Intel”s Core series, AMD”s Ryzen series, and ARM-based processors used in smartphones and tablets. Special-Purpose Microprocessors − These are microprocessors designed for specific applications or tasks. They are optimized for particular functions or industries and may have features tailored to meet the requirements of those applications. Examples include microcontrollers used in