Category: microprocessor

Microprocessor – 8086 Overview 8086 Microprocessor is an enhanced version of 8085Microprocessor that was designed by Intel in 1976. It is a 16-bit Microprocessor having 20 address lines and16 data lines that provides up to 1MB storage. It consists of powerful instruction set, which provides operations like multiplication and division easily. It supports two modes of operation, i.e. Maximum mode and Minimum mode. Maximum mode is suitable for system having multiple processors and Minimum mode is suitable for system having a single processor. Features of 8086 The most prominent features of a 8086 microprocessor are as follows − It has an instruction queue, which is capable of storing six instruction bytes from the memory resulting in faster processing. It was the first 16-bit processor having 16-bit ALU, 16-bit registers, internal data bus, and 16-bit external data bus resulting in faster processing. It is available in 3 versions based on the frequency of operation − 8086 → 5MHz 8086-2 → 8MHz (c)8086-1 → 10 MHz It uses two stages of pipelining, i.e. Fetch Stage and Execute Stage, which improves performance. Fetch stage can prefetch up to 6 bytes of instructions and stores them in the queue. Execute stage executes these instructions. It has 256 vectored interrupts. It consists of 29,000 transistors. Comparison between 8085 & 8086 Microprocessor Size − 8085 is 8-bit microprocessor, whereas 8086 is 16-bit microprocessor. Address Bus − 8085 has 16-bit address bus while 8086 has 20-bit address bus. Memory − 8085 can access up to 64Kb, whereas 8086 can access up to 1 Mb of memory. Instruction − 8085 doesn’t have an instruction queue, whereas 8086 has an instruction queue. Pipelining − 8085 doesn’t support a pipelined architecture while 8086 supports a pipelined architecture. I/O − 8085 can address 2^8 = 256 I/O”s, whereas 8086 can access 2^16 = 65,536 I/O”s. Cost − The cost of 8085 is low whereas that of 8086 is high. Architecture of 8086 The following diagram depicts the architecture of a 8086 Microprocessor − Learning working make money

Microprocessor – 8086 Functional Units 8086 Microprocessor is divided into two functional units, i.e., EU (Execution Unit) and BIU (Bus Interface Unit). EU (Execution Unit) Execution unit gives instructions to BIU stating from where to fetch the data and then decode and execute those instructions. Its function is to control operations on data using the instruction decoder & ALU. EU has no direct connection with system buses as shown in the above figure, it performs operations over data through BIU. Let us now discuss the functional parts of 8086 microprocessors. ALU It handles all arithmetic and logical operations, like +, −, ×, /, OR, AND, NOT operations. Flag Register It is a 16-bit register that behaves like a flip-flop, i.e. it changes its status according to the result stored in the accumulator. It has 9 flags and they are divided into 2 groups − Conditional Flags and Control Flags. Conditional Flags It represents the result of the last arithmetic or logical instruction executed. Following is the list of conditional flags − Carry flag − This flag indicates an overflow condition for arithmetic operations. Auxiliary flag − When an operation is performed at ALU, it results in a carry/barrow from lower nibble (i.e. D0 – D3) to upper nibble (i.e. D4 – D7), then this flag is set, i.e. carry given by D3 bit to D4 is AF flag. The processor uses this flag to perform binary to BCD conversion. Parity flag − This flag is used to indicate the parity of the result, i.e. when the lower order 8-bits of the result contains even number of 1’s, then the Parity Flag is set. For odd number of 1’s, the Parity Flag is reset. Zero flag − This flag is set to 1 when the result of arithmetic or logical operation is zero else it is set to 0. Sign flag − This flag holds the sign of the result, i.e. when the result of the operation is negative, then the sign flag is set to 1 else set to 0. Overflow flag − This flag represents the result when the system capacity is exceeded. Control Flags Control flags controls the operations of the execution unit. Following is the list of control flags − Trap flag − It is used for single step control and allows the user to execute one instruction at a time for debugging. If it is set, then the program can be run in a single step mode. Interrupt flag − It is an interrupt enable/disable flag, i.e. used to allow/prohibit the interruption of a program. It is set to 1 for interrupt enabled condition and set to 0 for interrupt disabled condition. Direction flag − It is used in string operation. As the name suggests when it is set then string bytes are accessed from the higher memory address to the lower memory address and vice-a-versa. General purpose register There are 8 general purpose registers, i.e., AH, AL, BH, BL, CH, CL, DH, and DL. These registers can be used individually to store 8-bit data and can be used in pairs to store 16bit data. The valid register pairs are AH and AL, BH and BL, CH and CL, and DH and DL. It is referred to the AX, BX, CX, and DX respectively. AX register − It is also known as accumulator register. It is used to store operands for arithmetic operations. BX register − It is used as a base register. It is used to store the starting base address of the memory area within the data segment. CX register − It is referred to as counter. It is used in loop instruction to store the loop counter. DX register − This register is used to hold I/O port address for I/O instruction. Stack pointer register It is a 16-bit register, which holds the address from the start of the segment to the memory location, where a word was most recently stored on the stack. BIU (Bus Interface Unit) BIU takes care of all data and addresses transfers on the buses for the EU like sending addresses, fetching instructions from the memory, reading data from the ports and the memory as well as writing data to the ports and the memory. EU has no direction connection with System Buses so this is possible with the BIU. EU and BIU are connected with the Internal Bus. It has the following functional parts − Instruction queue − BIU contains the instruction queue. BIU gets upto 6 bytes of next instructions and stores them in the instruction queue. When EU executes instructions and is ready for its next instruction, then it simply reads the instruction from this instruction queue resulting in increased execution speed. Fetching the next instruction while the current instruction executes is called pipelining. Segment register − BIU has 4 segment buses, i.e. CS, DS, SS& ES. It holds the addresses of instructions and data in memory, which are used by the processor to access memory locations. It also contains 1 pointer register IP, which holds the address of the next instruction to executed by the EU. CS − It stands for Code Segment. It is used for addressing a memory location in the code segment of the memory, where the executable program is stored. DS − It stands for Data Segment. It consists of data used by the program andis accessed in the data segment by an offset address or the content of other register that holds the offset address. SS − It stands for Stack Segment. It handles memory to store data and addresses during execution. ES − It stands for Extra Segment. ES is additional data segment, which is used by the string to hold the extra destination data. Instruction pointer − It is a 16-bit register used to hold the address of the next instruction to be executed. Learning working make money

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Intel 8255A – Pin Description ”; Previous Next Let us first take a look at the pin diagram of Intel 8255A − Now let us discuss the functional description of the pins in 8255A. Data Bus Buffer It is a tri-state 8-bit buffer, which is used to interface the microprocessor to the system data bus. Data is transmitted or received by the buffer as per the instructions by the CPU. Control words and status information is also transferred using this bus. Read/Write Control Logic This block is responsible for controlling the internal/external transfer of data/control/status word. It accepts the input from the CPU address and control buses, and in turn issues command to both the control groups. CS It stands for Chip Select. A LOW on this input selects the chip and enables the communication between the 8255A and the CPU. It is connected to the decoded address, and A0 & A1 are connected to the microprocessor address lines. Their result depends on the following conditions − CS A1 A0 Result 0 0 0 PORT A 0 0 1 PORT B 0 1 0 PORT C 0 1 1 Control Register 1 X X No Selection WR It stands for write. This control signal enables the write operation. When this signal goes low, the microprocessor writes into a selected I/O port or control register. RESET This is an active high signal. It clears the control register and sets all ports in the input mode. RD It stands for Read. This control signal enables the Read operation. When the signal is low, the microprocessor reads the data from the selected I/O port of the 8255. A0 and A1 These input signals work with RD, WR, and one of the control signal. Following is the table showing their various signals with their result. A1 A0 RD WR CS Result 0 0 0 1 0 Input Operation PORT A → Data Bus 0 1 0 1 0 PORT B → Data Bus 1 0 0 1 0 PORT C → Data Bus 0 0 1 0 0 Output Operation Data Bus → PORT A 0 1 1 0 0 Data Bus → PORT A 1 0 1 0 0 Data Bus → PORT B 1 1 1 0 0 Data Bus → PORT D Print Page Previous Next Advertisements ”;

Microprocessor – 8085 Instruction Sets ”; Previous Next Let us take a look at the programming of 8085 Microprocessor. Instruction sets are instruction codes to perform some task. It is classified into five categories. S.No. Instruction & Description 1 Control Instructions Following is the table showing the list of Control instructions with their meanings. 2 Logical Instructions Following is the table showing the list of Logical instructions with their meanings. 3 Branching Instructions Following is the table showing the list of Branching instructions with their meanings. 4 Arithmetic Instructions Following is the table showing the list of Arithmetic instructions with their meanings. 5 Data Transfer Instructions Following is the table showing the list of Data-transfer instructions with their meanings. 8085 – Demo Programs Now, let us take a look at some program demonstrations using the above instructions − Adding Two 8-bit Numbers Write a program to add data at 3005H & 3006H memory location and store the result at 3007H memory location. Problem demo − (3005H) = 14H (3006H) = 89H Result − 14H + 89H = 9DH The program code can be written like this − LXI H 3005H : “HL points 3005H” MOV A, M : “Getting first operand” INX H : “HL points 3006H” ADD M : “Add second operand” INX H : “HL points 3007H” MOV M, A : “Store result at 3007H” HLT : “Exit program” Exchanging the Memory Locations Write a program to exchange the data at 5000M& 6000M memory location. LDA 5000M : “Getting the contents at5000M location into accumulator” MOV B, A : “Save the contents into B register” LDA 6000M : “Getting the contents at 6000M location into accumulator” STA 5000M : “Store the contents of accumulator at address 5000M” MOV A, B : “Get the saved contents back into A register” STA 6000M : “Store the contents of accumulator at address 6000M” Arrange Numbers in an Ascending Order Write a program to arrange first 10 numbers from memory address 3000H in an ascending order. MVI B, 09 :”Initialize counter” START :”LXI H, 3000H: Initialize memory pointer” MVI C, 09H :”Initialize counter 2″ BACK: MOV A, M :”Get the number” INX H :”Increment memory pointer” CMP M :”Compare number with next number” JC SKIP :”If less, don’t interchange” JZ SKIP :”If equal, don’t interchange” MOV D, M MOV M, A DCX H MOV M, D INX H :”Interchange two numbers” SKIP:DCR C :”Decrement counter 2″ JNZ BACK :”If not zero, repeat” DCR B :”Decrement counter 1″ JNZ START HLT :”Terminate program execution” Print Page Previous Next Advertisements ”;

8255A – Programmable Peripheral Interface ”; Previous Next The 8255A is a general purpose programmable I/O device designed to transfer the data from I/O to interrupt I/O under certain conditions as required. It can be used with almost any microprocessor. It consists of three 8-bit bidirectional I/O ports (24I/O lines) which can be configured as per the requirement. Ports of 8255A 8255A has three ports, i.e., PORT A, PORT B, and PORT C. Port A contains one 8-bit output latch/buffer and one 8-bit input buffer. Port B is similar to PORT A. Port C can be split into two parts, i.e. PORT C lower (PC0-PC3) and PORT C upper (PC7-PC4) by the control word. These three ports are further divided into two groups, i.e. Group A includes PORT A and upper PORT C. Group B includes PORT B and lower PORT C. These two groups can be programmed in three different modes, i.e. the first mode is named as mode 0, the second mode is named as Mode 1 and the third mode is named as Mode 2. Operating Modes 8255A has three different operating modes − Mode 0 − In this mode, Port A and B is used as two 8-bit ports and Port C as two 4-bit ports. Each port can be programmed in either input mode or output mode where outputs are latched and inputs are not latched. Ports do not have interrupt capability. Mode 1 − In this mode, Port A and B is used as 8-bit I/O ports. They can be configured as either input or output ports. Each port uses three lines from port C as handshake signals. Inputs and outputs are latched. Mode 2 − In this mode, Port A can be configured as the bidirectional port and Port B either in Mode 0 or Mode 1. Port A uses five signals from Port C as handshake signals for data transfer. The remaining three signals from Port C can be used either as simple I/O or as handshake for port B. Features of 8255A The prominent features of 8255A are as follows − It consists of 3 8-bit IO ports i.e. PA, PB, and PC. Address/data bus must be externally demux”d. It is TTL compatible. It has improved DC driving capability. 8255 Architecture The following figure shows the architecture of 8255A − Print Page Previous Next Advertisements ”;

Microprocessor – I/O Interfacing Overview ”; Previous Next In this chapter, we will discuss Memory Interfacing and IO Interfacing with 8085. Interface is the path for communication between two components. Interfacing is of two types, memory interfacing and I/O interfacing. Memory Interfacing When we are executing any instruction, we need the microprocessor to access the memory for reading instruction codes and the data stored in the memory. For this, both the memory and the microprocessor requires some signals to read from and write to registers. The interfacing process includes some key factors to match with the memory requirements and microprocessor signals. The interfacing circuit therefore should be designed in such a way that it matches the memory signal requirements with the signals of the microprocessor. IO Interfacing There are various communication devices like the keyboard, mouse, printer, etc. So, we need to interface the keyboard and other devices with the microprocessor by using latches and buffers. This type of interfacing is known as I/O interfacing. Block Diagram of Memory and I/O Interfacing 8085 Interfacing Pins Following is the list of 8085 pins used for interfacing with other devices − A15 – A8 (Higher Address Bus) AD7 – AD0(Lower Address/Data Bus) ALE RD WR READY Ways of Communication − Microprocessor with the Outside World? There are two ways of communication in which the microprocessor can connect with the outside world. Serial Communication Interface Parallel Communication interface Serial Communication Interface − In this type of communication, the interface gets a single byte of data from the microprocessor and sends it bit by bit to the other system serially and vice-a-versa. Parallel Communication Interface − In this type of communication, the interface gets a byte of data from the microprocessor and sends it bit by bit to the other systems in simultaneous (or) parallel fashion and vice-a-versa. Print Page Previous Next Advertisements ”;

Intel 8253/54 – Operational Modes ”; Previous Next 8253/54 can be operated in 6 different modes. In this chapter, we will discuss these operational modes. Mode 0 ─ Interrupt on Terminal Count It is used to generate an interrupt to the microprocessor after a certain interval. Initially the output is low after the mode is set. The output remains LOW after the count value is loaded into the counter. The process of decrementing the counter continues till the terminal count is reached, i.e., the count become zero and the output goes HIGH and will remain high until it reloads a new count. The GATE signal is high for normal counting. When GATE goes low, counting is terminated and the current count is latched till the GATE goes high again. Mode 1 – Programmable One Shot It can be used as a mono stable multi-vibrator. The gate input is used as a trigger input in this mode. The output remains high until the count is loaded and a trigger is applied. Mode 2 – Rate Generator The output is normally high after initialization. Whenever the count becomes zero, another low pulse is generated at the output and the counter will be reloaded. Mode 3 – Square Wave Generator This mode is similar to Mode 2 except the output remains low for half of the timer period and high for the other half of the period. Mode 4 − Software Triggered Mode In this mode, the output will remain high until the timer has counted to zero, at which point the output will pulse low and then go high again. The count is latched when the GATE signal goes LOW. On the terminal count, the output goes low for one clock cycle then goes HIGH. This low pulse can be used as a strobe. Mode 5 – Hardware Triggered Mode This mode generates a strobe in response to an externally generated signal. This mode is similar to mode 4 except that the counting is initiated by a signal at the gate input, which means it is hardware triggered instead of software triggered. After it is initialized, the output goes high. When the terminal count is reached, the output goes low for one clock cycle. Print Page Previous Next Advertisements ”;

Microprocessor – Overview ”; Previous Next Microprocessor is a controlling unit of a micro-computer, fabricated on a small chip capable of performing ALU (Arithmetic Logical Unit) operations and communicating with the other devices connected to it. Microprocessor consists of an ALU, register array, and a control unit. ALU performs arithmetical and logical operations on the data received from the memory or an input device. Register array consists of registers identified by letters like B, C, D, E, H, L and accumulator. The control unit controls the flow of data and instructions within the computer. Block Diagram of a Basic Microcomputer How does a Microprocessor Work? The microprocessor follows a sequence: Fetch, Decode, and then Execute. Initially, the instructions are stored in the memory in a sequential order. The microprocessor fetches those instructions from the memory, then decodes it and executes those instructions till STOP instruction is reached. Later, it sends the result in binary to the output port. Between these processes, the register stores the temporarily data and ALU performs the computing functions. List of Terms Used in a Microprocessor Here is a list of some of the frequently used terms in a microprocessor − Instruction Set − It is the set of instructions that the microprocessor can understand. Bandwidth − It is the number of bits processed in a single instruction. Clock Speed − It determines the number of operations per second the processor can perform. It is expressed in megahertz (MHz) or gigahertz (GHz).It is also known as Clock Rate. Word Length − It depends upon the width of internal data bus, registers, ALU, etc. An 8-bit microprocessor can process 8-bit data at a time. The word length ranges from 4 bits to 64 bits depending upon the type of the microcomputer. Data Types − The microprocessor has multiple data type formats like binary, BCD, ASCII, signed and unsigned numbers. Features of a Microprocessor Here is a list of some of the most prominent features of any microprocessor − Cost-effective − The microprocessor chips are available at low prices and results its low cost. Size − The microprocessor is of small size chip, hence is portable. Low Power Consumption − Microprocessors are manufactured by using metaloxide semiconductor technology, which has low power consumption. Versatility − The microprocessors are versatile as we can use the same chip in a number of applications by configuring the software program. Reliability − The failure rate of an IC in microprocessors is very low, hence it is reliable. Print Page Previous Next Advertisements ”;

Microcontrollers 8051 Input Output Ports ”; Previous Next 8051 microcontrollers have 4 I/O ports each of 8-bit, which can be configured as input or output. Hence, total 32 input/output pins allow the microcontroller to be connected with the peripheral devices. Pin configuration, i.e. the pin can be configured as 1 for input and 0 for output as per the logic state. Input/Output (I/O) pin − All the circuits within the microcontroller must be connected to one of its pins except P0 port because it does not have pull-up resistors built-in. Input pin − Logic 1 is applied to a bit of the P register. The output FE transistor is turned off and the other pin remains connected to the power supply voltage over a pull-up resistor of high resistance. Port 0 − The P0 (zero) port is characterized by two functions − When the external memory is used then the lower address byte (addresses A0A7) is applied on it, else all bits of this port are configured as input/output. When P0 port is configured as an output then other ports consisting of pins with built-in pull-up resistor connected by its end to 5V power supply, the pins of this port have this resistor left out. Input Configuration If any pin of this port is configured as an input, then it acts as if it “floats”, i.e. the input has unlimited input resistance and in-determined potential. Output Configuration When the pin is configured as an output, then it acts as an “open drain”. By applying logic 0 to a port bit, the appropriate pin will be connected to ground (0V), and applying logic 1, the external output will keep on “floating”. In order to apply logic 1 (5V) on this output pin, it is necessary to build an external pullup resistor. Port 1 P1 is a true I/O port as it doesn’t have any alternative functions as in P0, but this port can be configured as general I/O only. It has a built-in pull-up resistor and is completely compatible with TTL circuits. Port 2 P2 is similar to P0 when the external memory is used. Pins of this port occupy addresses intended for the external memory chip. This port can be used for higher address byte with addresses A8-A15. When no memory is added then this port can be used as a general input/output port similar to Port 1. Port 3 In this port, functions are similar to other ports except that the logic 1 must be applied to appropriate bit of the P3 register. Pins Current Limitations When pins are configured as an output (i.e. logic 0), then the single port pins can receive a current of 10mA. When these pins are configured as inputs (i.e. logic 1), then built-in pull-up resistors provide very weak current, but can activate up to 4 TTL inputs of LS series. If all 8 bits of a port are active, then the total current must be limited to 15mA (port P0: 26mA). If all ports (32 bits) are active, then the total maximum current must be limited to 71mA. Print Page Previous Next Advertisements ”;