Learning ES – Timer/Counter work project make money

Embedded Systems – Timer/Counter A timer is a specialized type of clock which is used to measure time intervals. A timer that counts from zero upwards for measuring time elapsed is often called a stopwatch. It is a device that counts down from a specified time interval and used to generate a time delay, for example, an hourglass is a timer. A counter is a device that stores (and sometimes displays) the number of times a particular event or process occurred, with respect to a clock signal. It is used to count the events happening outside the microcontroller. In electronics, counters can be implemented quite easily using register-type circuits such as a flip-flop. Difference between a Timer and a Counter The points that differentiate a timer from a counter are as follows − Timer Counter The register incremented for every machine cycle. The register is incremented considering 1 to 0 transition at its corresponding to an external input pin (T0, T1). Maximum count rate is 1/12 of the oscillator frequency. Maximum count rate is 1/24 of the oscillator frequency. A timer uses the frequency of the internal clock, and generates delay. A counter uses an external signal to count pulses. Timers of 8051 and their Associated Registers The 8051 has two timers, Timer 0 and Timer 1. They can be used as timers or as event counters. Both Timer 0 and Timer 1 are 16-bit wide. Since the 8051 follows an 8-bit architecture, each 16 bit is accessed as two separate registers of low-byte and high-byte. Timer 0 Register The 16-bit register of Timer 0 is accessed as low- and high-byte. The low-byte register is called TL0 (Timer 0 low byte) and the high-byte register is called TH0 (Timer 0 high byte). These registers can be accessed like any other register. For example, the instruction MOV TL0, #4H moves the value into the low-byte of Timer #0. Timer 1 Register The 16-bit register of Timer 1 is accessed as low- and high-byte. The low-byte register is called TL1 (Timer 1 low byte) and the high-byte register is called TH1 (Timer 1 high byte). These registers can be accessed like any other register. For example, the instruction MOV TL1, #4H moves the value into the low-byte of Timer 1. TMOD (Timer Mode) Register Both Timer 0 and Timer 1 use the same register to set the various timer operation modes. It is an 8-bit register in which the lower 4 bits are set aside for Timer 0 and the upper four bits for Timers. In each case, the lower 2 bits are used to set the timer mode in advance and the upper 2 bits are used to specify the location. Gate − When set, the timer only runs while INT(0,1) is high. C/T − Counter/Timer select bit. M1 − Mode bit 1. M0 − Mode bit 0. GATE Every timer has a means of starting and stopping. Some timers do this by software, some by hardware, and some have both software and hardware controls. 8051 timers have both software and hardware controls. The start and stop of a timer is controlled by software using the instruction SETB TR1 and CLR TR1 for timer 1, and SETB TR0 and CLR TR0 for timer 0. The SETB instruction is used to start it and it is stopped by the CLR instruction. These instructions start and stop the timers as long as GATE = 0 in the TMOD register. Timers can be started and stopped by an external source by making GATE = 1 in the TMOD register. C/T (CLOCK / TIMER) This bit in the TMOD register is used to decide whether a timer is used as a delay generator or an event manager. If C/T = 0, it is used as a timer for timer delay generation. The clock source to create the time delay is the crystal frequency of the 8051. If C/T = 0, the crystal frequency attached to the 8051 also decides the speed at which the 8051 timer ticks at a regular interval. Timer frequency is always 1/12th of the frequency of the crystal attached to the 8051. Although various 8051 based systems have an XTAL frequency of 10 MHz to 40 MHz, we normally work with the XTAL frequency of 11.0592 MHz. It is because the baud rate for serial communication of the 8051.XTAL = 11.0592 allows the 8051 system to communicate with the PC with no errors. M1 / M2 M1 M2 Mode 0 0 13-bit timer mode. 0 1 16-bit timer mode. 1 0 8-bit auto reload mode. 1 1 Spilt mode. Different Modes of Timers Mode 0 (13-Bit Timer Mode) Both Timer 1 and Timer 0 in Mode 0 operate as 8-bit counters (with a divide-by-32 prescaler). Timer register is configured as a 13-bit register consisting of all the 8 bits of TH1 and the lower 5 bits of TL1. The upper 3 bits of TL1 are indeterminate and should be ignored. Setting the run flag (TR1) does not clear the register. The timer interrupt flag TF1 is set when the count rolls over from all 1s to all 0s. Mode 0 operation is the same for Timer 0 as it is for Timer 1. Mode 1 (16-Bit Timer Mode) Timer mode “1” is a 16-bit timer and is a commonly used mode. It functions in the same way as 13-bit mode except that all 16 bits are used. TLx is incremented starting from 0 to a maximum 255. Once the value 255 is reached, TLx resets to 0 and then THx is incremented by 1. As being a full 16-bit timer, the timer may contain up to 65536 distinct values and it will overflow back to 0 after 65,536 machine cycles. Mode 2 (8 Bit Auto Reload) Both the timer registers are configured as 8-bit counters (TL1 and TL0) with automatic reload. Overflow from TL1 (TL0) sets TF1 (TF0) and also reloads TL1 (TL0) with the contents of Th1 (TH0), which

Learning ES – Special Function Registers work project make money

Embedded Systems – SFR Registers A Special Function Register (or Special Purpose Register, or simply Special Register) is a register within a microprocessor that controls or monitors the various functions of a microprocessor. As the special registers are closely tied to some special function or status of the processor, they might not be directly writable by normal instructions (like add, move, etc.). Instead, some special registers in some processor architectures require special instructions to modify them. In the 8051, register A, B, DPTR, and PSW are a part of the group of registers commonly referred to as SFR (special function registers). An SFR can be accessed by its name or by its address. The following table shows a list of SFRs and their addresses. Byte Address Bit Address FF F0 F7 F6 F5 F4 F3 F2 F1 F0 B E0 E7 E6 E5 E4 E3 E2 E1 E0 ACC D0 D7 D6 D5 D4 D3 D2 – D0 PSW B8 – – – BC BB BA B9 B8 IP B0 B7 B6 B5 B4 B3 B2 B1 B0 P3 A2 AF – – AC AB AA A9 A8 IE A0 A7 A6 A5 A4 A3 A2 A1 A0 P2 99 Not bit Addressable SBUF 98 9F 9E 9D 9C 9B 9A 99 98 SCON 90 97 96 95 94 93 92 91 90 P1 8D Not bit Addressable TH1 8C Not bit Addressable TH0 8B Not bit Addressable TL1 8A Not bit Addressable TL0 89 Not bit Addressable TMOD 88 8F 8E 8D 8C 8B 8A 89 88 TCON 87 Not bit Addressable PCON 83 Not bit Addressable DPH 82 Not bit Addressable DPL 81 Not bit Addressable SP 80 87 87 85 84 83 82 81 80 P0 Consider the following two points about the SFR addresses. A special function register can have an address between 80H to FFH. These addresses are above 80H, as the addresses from 00 to 7FH are the addresses of RAM memory inside the 8051. Not all the address space of 80 to FF are used by the SFR. Unused locations, 80H to FFH, are reserved and must not be used by the 8051 programmer. CY PSW.7 Carry Flag AC PSW.6 Auxiliary Carry Flag F0 PSW.5 Flag 0 available to user for general purpose. RS1 PSW.4 Register Bank selector bit 1 RS0 PSW.3 Register Bank selector bit 0 OV PSW.2 Overflow Flag – PSW.1 User definable FLAG P PSW.0 Parity FLAG. Set/ cleared by hardware during instruction cycle to indicate even/odd number of 1 bit in accumulator. In the following example, the SFR registers’ names are replaced with their addresses. CY AC F0 RS1 RS0 OV – P We can select the corresponding Register Bank bit using RS0 and RS1 bits. RS1 RS2 Register Bank Address 0 0 0 00H-07H 0 1 1 08H-0FH 1 0 2 10H-17H 1 1 3 18H-1FH The Program Status Word (PSW) contains status bits to reflect the current state of the CPU. The 8051 variants provide one special function register, PSW, with this status information. The 8251 provides two additional status flags, Z and N, which are available in a second special function register called PSW1. Learning working make money

Learning ES – Instructions work project make money

Embedded Systems – Instructions The flow of program proceeds in a sequential manner, from one instruction to the next instruction, unless a control transfer instruction is executed. The various types of control transfer instruction in assembly language include conditional or unconditional jumps and call instructions. Loop and Jump Instructions Looping in the 8051 Repeating a sequence of instructions a certain number of times is called a loop. An instruction DJNZ reg, label is used to perform a Loop operation. In this instruction, a register is decremented by 1; if it is not zero, then 8051 jumps to the target address referred to by the label. The register is loaded with the counter for the number of repetitions prior to the start of the loop. In this instruction, both the registers decrement and the decision to jump are combined into a single instruction. The registers can be any of R0–R7. The counter can also be a RAM location. Example Multiply 25 by 10 using the technique of repeated addition. Solution − Multiplication can be achieved by adding the multiplicand repeatedly, as many times as the multiplier. For example, 25 * 10 = 250(FAH) 25 + 25 + 25 + 25 + 25 + 25 + 25 + 25 + 25 + 25 = 250 MOV A,#0 ;A = 0,clean ACC MOV R2,#10 ; the multiplier is replaced in R2 Add A,#25 ;add the multiplicand to the ACC AGAIN:DJNZ R2, AGAIN:repeat until R2 = 0 (10 times) MOV R5 , A ;save A in R5 ;R5 (FAH) Drawback in 8051 − Looping action with the instruction DJNZ Reg label is limited to 256 iterations only. If a conditional jump is not taken, then the instruction following the jump is executed. Looping inside a Loop When we use a loop inside another loop, it is called a nested loop. Two registers are used to hold the count when the maximum count is limited to 256. So we use this method to repeat the action more times than 256. Example Write a program to − Load the accumulator with the value 55H. Complement the ACC 700 times. Solution − Since 700 is greater than 255 (the maximum capacity of any register), two registers are used to hold the count. The following code shows how to use two registers, R2 and R3, for the count. MOV A,#55H ;A = 55H NEXT: MOV R3,#10 ;R3 the outer loop counter AGAIN:MOV R2,#70 ;R2 the inner loop counter CPL A ;complement Other Conditional Jumps The following table lists the conditional jumps used in 8051 − Instruction Action JZ Jump if A = 0 JNZ Jump if A ≠ 0 DJNZ Decrement and Jump if register ≠ 0 CJNE A, data Jump if A ≠ data CJNE reg, #data Jump if byte ≠ data JC Jump if CY = 1 JNC Jump if CY ≠ 1 JB Jump if bit = 1 JNB Jump if bit = 0 JBC Jump if bit = 1 and clear bit JZ (jump if A = 0) − In this instruction, the content of the accumulator is checked. If it is zero, then the 8051 jumps to the target address. JZ instruction can be used only for the accumulator, it does not apply to any other register. JNZ (jump if A is not equal to 0) − In this instruction, the content of the accumulator is checked to be non-zero. If it is not zero, then the 8051 jumps to the target address. JNC (Jump if no carry, jumps if CY = 0) − The Carry flag bit in the flag (or PSW) register is used to make the decision whether to jump or not “JNC label”. The CPU looks at the carry flag to see if it is raised (CY = 1). If it is not raised, then the CPU starts to fetch and execute instructions from the address of the label. If CY = 1, it will not jump but will execute the next instruction below JNC. JC (Jump if carry, jumps if CY = 1) − If CY = 1, it jumps to the target address. JB (jump if bit is high) JNB (jump if bit is low) Note − It must be noted that all conditional jumps are short jumps, i.e., the address of the target must be within –128 to +127 bytes of the contents of the program counter. Unconditional Jump Instructions There are two unconditional jumps in 8051 − LJMP (long jump) − LJMP is 3-byte instruction in which the first byte represents opcode, and the second and third bytes represent the 16-bit address of the target location. The 2-byte target address is to allow a jump to any memory location from 0000 to FFFFH. SJMP (short jump) − It is a 2-byte instruction where the first byte is the opcode and the second byte is the relative address of the target location. The relative address ranges from 00H to FFH which is divided into forward and backward jumps; that is, within –128 to +127 bytes of memory relative to the address of the current PC (program counter). In case of forward jump, the target address can be within a space of 127 bytes from the current PC. In case of backward jump, the target address can be within –128 bytes from the current PC. Calculating the Short Jump Address All conditional jumps (JNC, JZ, and DJNZ) are short jumps because they are 2-byte instructions. In these instructions, the first byte represents opcode and the second byte represents the relative address. The target address is always relative to the value of the program counter. To calculate the target address, the second byte is added to the PC of the instruction immediately below the jump. Take a look at the program given below − Line PC Op-code Mnemonic Operand 1 0000 ORG 0000 2 0000 7800 MOV R0,#003 3 0002 7455 MOV A,#55H0 4 0004 6003 JZ NEXT 5 0006 08 INC R0 6 0007 04 AGAIN:

Learning ES – Useful Resources work project make money

Embedded Systems – Useful Resources The following resources contain additional information on Embedded Systems. Please use them to get more in-depth knowledge on this topic. Useful Video Courses Best Seller 66 Lectures 6.5 hours 37 Lectures 4.5 hours 24 Lectures 2 hours Featured 66 Lectures 5.5 hours Featured 49 Lectures 8.5 hours 41 Lectures 5 hours Learning working make money

Learning ES – Tools and Peripherals work project make money

Embedded Systems – Tools & Peripherals Compilers and Assemblers Compiler A compiler is a computer program (or a set of programs) that transforms the source code written in a programming language (the source language) into another computer language (normally binary format). The most common reason for conversion is to create an executable program. The name “compiler” is primarily used for programs that translate the source code from a highlevel programming language to a low-level language (e.g., assembly language or machine code). Cross-Compiler If the compiled program can run on a computer having different CPU or operating system than the computer on which the compiler compiled the program, then that compiler is known as a cross-compiler. Decompiler A program that can translate a program from a low-level language to a high-level language is called a decompiler. Language Converter A program that translates programs written in different high-level languages is normally called a language translator, source to source translator, or language converter. A compiler is likely to perform the following operations − Preprocessing Parsing Semantic Analysis (Syntax-directed translation) Code generation Code optimization Assemblers An assembler is a program that takes basic computer instructions (called as assembly language) and converts them into a pattern of bits that the computer”s processor can use to perform its basic operations. An assembler creates object code by translating assembly instruction mnemonics into opcodes, resolving symbolic names to memory locations. Assembly language uses a mnemonic to represent each low-level machine operation (opcode). Debugging Tools in an Embedded System Debugging is a methodical process to find and reduce the number of bugs in a computer program or a piece of electronic hardware, so that it works as expected. Debugging is difficult when subsystems are tightly coupled, because a small change in one subsystem can create bugs in another. The debugging tools used in embedded systems differ greatly in terms of their development time and debugging features. We will discuss here the following debugging tools − Simulators Microcontroller starter kits Emulator Simulators Code is tested for the MCU / system by simulating it on the host computer used for code development. Simulators try to model the behavior of the complete microcontroller in software. Functions of Simulators A simulator performs the following functions − Defines the processor or processing device family as well as its various versions for the target system. Monitors the detailed information of a source code part with labels and symbolic arguments as the execution goes on for each single step. Provides the status of RAM and simulated ports of the target system for each single step execution. Monitors system response and determines throughput. Provides trace of the output of contents of program counter versus the processor registers. Provides the detailed meaning of the present command. Monitors the detailed information of the simulator commands as these are entered from the keyboard or selected from the menu. Supports the conditions (up to 8 or 16 or 32 conditions) and unconditional breakpoints. Provides breakpoints and the trace which are together the important testing and debugging tool. Facilitates synchronizing the internal peripherals and delays. Microcontroller Starter Kit A microcontroller starter kit consists of − Hardware board (Evaluation board) In-system programmer Some software tools like compiler, assembler, linker, etc. Sometimes, an IDE and code size limited evaluation version of a compiler. A big advantage of these kits over simulators is that they work in real-time and thus allow for easy input/output functionality verification. Starter kits, however, are completely sufficient and the cheapest option to develop simple microcontroller projects. Emulators An emulator is a hardware kit or a software program or can be both which emulates the functions of one computer system (the guest) in another computer system (the host), different from the first one, so that the emulated behavior closely resembles the behavior of the real system (the guest). Emulation refers to the ability of a computer program in an electronic device to emulate (imitate) another program or device. Emulation focuses on recreating an original computer environment. Emulators have the ability to maintain a closer connection to the authenticity of the digital object. An emulator helps the user to work on any kind of application or operating system on a platform in a similar way as the software runs as in its original environment. Peripheral Devices in Embedded Systems Embedded systems communicate with the outside world via their peripherals, such as following &mins; Serial Communication Interfaces (SCI) like RS-232, RS-422, RS-485, etc. Synchronous Serial Communication Interface like I2C, SPI, SSC, and ESSI Universal Serial Bus (USB) Multi Media Cards (SD Cards, Compact Flash, etc.) Networks like Ethernet, LonWorks, etc. Fieldbuses like CAN-Bus, LIN-Bus, PROFIBUS, etc. imers like PLL(s), Capture/Compare and Time Processing Units. Discrete IO aka General Purpose Input/Output (GPIO) Analog to Digital/Digital to Analog (ADC/DAC) Debugging like JTAG, ISP, ICSP, BDM Port, BITP, and DP9 ports Criteria for Choosing Microcontroller While choosing a microcontroller, make sure it meets the task at hand and that it is cost effective. We must see whether an 8-bit, 16-bit or 32-bit microcontroller can best handle the computing needs of a task. In addition, the following points should be kept in mind while choosing a microcontroller − Speed − What is the highest speed the microcontroller can support? Packaging − Is it 40-pin DIP (Dual-inline-package) or QFP (Quad flat package)? This is important in terms of space, assembling, and prototyping the end-product. Power Consumption − This is an important criteria for battery-powered products. Amount of RAM and ROM on the chip. Count of I/O pins and Timers on the chip. Cost per Unit − This is important in terms of final cost of the product in which the microcontroller is to be used. Further, make sure you have tools such as compilers, debuggers, and assemblers, available with the microcontroller. The most important of all, you should purchase a microcontroller from a reliable source. Learning working make money

Learning ES – 8051 Microcontroller work project make money

Embedded Systems – 8051 Microcontroller Brief History of 8051 The first microprocessor 4004 was invented by Intel Corporation. 8085 and 8086 microprocessors were also invented by Intel. In 1981, Intel introduced an 8-bit microcontroller called the 8051. It was referred as system on a chip because it had 128 bytes of RAM, 4K byte of on-chip ROM, two timers, one serial port, and 4 ports (8-bit wide), all on a single chip. When it became widely popular, Intel allowed other manufacturers to make and market different flavors of 8051 with its code compatible with 8051. It means that if you write your program for one flavor of 8051, it will run on other flavors too, regardless of the manufacturer. This has led to several versions with different speeds and amounts of on-chip RAM. 8051 Flavors / Members 8052 microcontroller − 8052 has all the standard features of the 8051 microcontroller as well as an extra 128 bytes of RAM and an extra timer. It also has 8K bytes of on-chip program ROM instead of 4K bytes. 8031 microcontroller − It is another member of the 8051 family. This chip is often referred to as a ROM-less 8051, since it has 0K byte of on-chip ROM. You must add external ROM to it in order to use it, which contains the program to be fetched and executed. This program can be as large as 64K bytes. But in the process of adding external ROM to the 8031, it lost 2 ports out of 4 ports. To solve this problem, we can add an external I/O to the 8031 Comparison between 8051 Family Members The following table compares the features available in 8051, 8052, and 8031. Feature 8051 8052 8031 ROM(bytes) 4K 8K 0K RAM(bytes) 128 256 128 Timers 2 3 2 I/O pins 32 32 32 Serial port 1 1 1 Interrupt sources 6 8 6 Features of 8051 Microcontroller An 8051 microcontroller comes bundled with the following features − 4KB bytes on-chip program memory (ROM) 128 bytes on-chip data memory (RAM) Four register banks 128 user defined software flags 8-bit bidirectional data bus 16-bit unidirectional address bus 32 general purpose registers each of 8-bit 16 bit Timers (usually 2, but may have more or less) Three internal and two external Interrupts Four 8-bit ports,(short model have two 8-bit ports) 16-bit program counter and data pointer 8051 may also have a number of special features such as UARTs, ADC, Op-amp, etc. Block Diagram of 8051 Microcontroller The following illustration shows the block diagram of an 8051 microcontroller − Learning working make money

Learning ES – I/O Programming work project make money

Embedded Systems – I/O Programming In 8051, I/O operations are done using four ports and 40 pins. The following pin diagram shows the details of the 40 pins. I/O operation port reserves 32 pins where each port has 8 pins. The other 8 pins are designated as Vcc, GND, XTAL1, XTAL2, RST, EA (bar), ALE/PROG (bar), and PSEN (bar). It is a 40 Pin PDIP (Plastic Dual Inline Package) Note − In a DIP package, you can recognize the first pin and the last pin by the cut at the middle of the IC. The first pin is on the left of this cut mark and the last pin (i.e. the 40th pin in this case) is to the right of the cut mark. I/O Ports and their Functions The four ports P0, P1, P2, and P3, each use 8 pins, making them 8-bit ports. Upon RESET, all the ports are configured as inputs, ready to be used as input ports. When the first 0 is written to a port, it becomes an output. To reconfigure it as an input, a 1 must be sent to a port. Port 0 (Pin No 32 – Pin No 39) It has 8 pins (32 to 39). It can be used for input or output. Unlike P1, P2, and P3 ports, we normally connect P0 to 10K-ohm pull-up resistors to use it as an input or output port being an open drain. It is also designated as AD0-AD7, allowing it to be used as both address and data. In case of 8031 (i.e. ROMless Chip), when we need to access the external ROM, then P0 will be used for both Address and Data Bus. ALE (Pin no 31) indicates if P0 has address or data. When ALE = 0, it provides data D0-D7, but when ALE = 1, it has address A0-A7. In case no external memory connection is available, P0 must be connected externally to a 10K-ohm pull-up resistor. MOV A,#0FFH ;(comments: A=FFH(Hexadecimal i.e. A=1111 1111) MOV P0,A ;(Port0 have 1”s on every pin so that it works as Input) Port 1 (Pin 1 through 8) It is an 8-bit port (pin 1 through 8) and can be used either as input or output. It doesn”t require pull-up resistors because they are already connected internally. Upon reset, Port 1 is configured as an input port. The following code can be used to send alternating values of 55H and AAH to Port 1. ;Toggle all bits of continuously MOV A,#55 BACK: MOV P2,A ACALL DELAY CPL A ;complement(invert) reg. A SJMP BACK If Port 1 is configured to be used as an output port, then to use it as an input port again, program it by writing 1 to all of its bits as in the following code. ;Toggle all bits of continuously MOV A ,#0FFH ;A = FF hex MOV P1,A ;Make P1 an input port MOV A,P1 ;get data from P1 MOV R7,A ;save it in Reg R7 ACALL DELAY ;wait MOV A,P1 ;get another data from P1 MOV R6,A ;save it in R6 ACALL DELAY ;wait MOV A,P1 ;get another data from P1 MOV R5,A ;save it in R5 Port 2 (Pins 21 through 28) Port 2 occupies a total of 8 pins (pins 21 through 28) and can be used for both input and output operations. Just as P1 (Port 1), P2 also doesn”t require external Pull-up resistors because they are already connected internally. It must be used along with P0 to provide the 16-bit address for the external memory. So it is also designated as (A0–A7), as shown in the pin diagram. When the 8051 is connected to an external memory, it provides path for upper 8-bits of 16-bits address, and it cannot be used as I/O. Upon reset, Port 2 is configured as an input port. The following code can be used to send alternating values of 55H and AAH to port 2. ;Toggle all bits of continuously MOV A,#55 BACK: MOV P2,A ACALL DELAY CPL A ; complement(invert) reg. A SJMP BACK If Port 2 is configured to be used as an output port, then to use it as an input port again, program it by writing 1 to all of its bits as in the following code. ;Get a byte from P2 and send it to P1 MOV A,#0FFH ;A = FF hex MOV P2,A ;make P2 an input port BACK: MOV A,P2 ;get data from P2 MOV P1,A ;send it to Port 1 SJMP BACK ;keep doing that Port 3 (Pins 10 through 17) It is also of 8 bits and can be used as Input/Output. This port provides some extremely important signals. P3.0 and P3.1 are RxD (Receiver) and TxD (Transmitter) respectively and are collectively used for Serial Communication. P3.2 and P3.3 pins are used for external interrupts. P3.4 and P3.5 are used for timers T0 and T1 respectively. P3.6 and P3.7 are Write (WR) and Read (RD) pins. These are active low pins, means they will be active when 0 is given to them and these are used to provide Read and Write operations to External ROM in 8031 based systems. P3 Bit Function Pin P3.0 RxD 10 P3.1 < TxD 11 P3.2 < Complement of INT0 12 P3.3 < INT1 13 P3.4 < T0 14 P3.5 < T1 15 P3.6 < WR 16 P3.7 < Complement of RD 17 Dual Role of Port 0 and Port 2 Dual role of Port 0 − Port 0 is also designated as AD0–AD7, as it can be used for both data and address handling. While connecting an 8051 to external memory, Port 0 can provide both address and data. The 8051 microcontroller then multiplexes the input as address or data in order to save pins. Dual role of Port 2 − Besides working as I/O, Port P2 is also used to provide 16-bit address bus for external memory along with Port 0. Port P2 is also designated as (A8– A15), while Port 0

Learning ES – Addressing Modes work project make money

Embedded Systems – Addressing Modes An addressing mode refers to how you are addressing a given memory location. There are five different ways or five addressing modes to execute this instruction which are as follows − Immediate addressing mode Direct addressing mode Register direct addressing mode Register indirect addressing mode Indexed addressing mode Immediate Addressing Mode Let”s begin with an example. MOV A, #6AH In general, we can write, MOV A, #data It is termed as immediate because 8-bit data is transferred immediately to the accumulator (destination operand). The following illustration describes the above instruction and its execution. The opcode 74H is saved at 0202 address. The data 6AH is saved at 0203 address in the program memory. After reading the opcode 74H, the data at the next program memory address is transferred to accumulator A (E0H is the address of accumulator). Since the instruction is of 2-bytes and is executed in one cycle, the program counter will be incremented by 2 and will point to 0204 of the program memory. Note − The ”#” symbol before 6AH indicates that the operand is a data (8 bit). In the absence of ”#”, the hexadecimal number would be taken as an address. Direct Addressing Mode This is another way of addressing an operand. Here, the address of the data (source data) is given as an operand. Let’s take an example. MOV A, 04H The register bank#0 (4th register) has the address 04H. When the MOV instruction is executed, the data stored in register 04H is moved to the accumulator. As the register 04H holds the data 1FH, 1FH is moved to the accumulator. Note − We have not used ”#” in direct addressing mode, unlike immediate mode. If we had used ”#”, the data value 04H would have been transferred to the accumulator instead of 1FH. Now, take a look at the following illustration. It shows how the instruction gets executed. As shown in the above illustration, this is a 2-byte instruction which requires 1 cycle to complete. The PC will be incremented by 2 and will point to 0204. The opcode for the instruction MOV A, address is E5H. When the instruction at 0202 is executed (E5H), the accumulator is made active and ready to receive data. Then the PC goes to the next address as 0203 and looks up the address of the location of 04H where the source data (to be transferred to accumulator) is located. At 04H, the control finds the data 1F and transfers it to the accumulator and hence the execution is completed. Register Direct Addressing Mode In this addressing mode, we use the register name directly (as source operand). Let us try to understand with the help of an example. MOV A, R4 At a time, the registers can take values from R0 to R7. There are 32 such registers. In order to use 32 registers with just 8 variables to address registers, register banks are used. There are 4 register banks named from 0 to 3. Each bank comprises of 8 registers named from R0 to R7. At a time, a single register bank can be selected. Selection of a register bank is made possible through a Special Function Register (SFR) named Processor Status Word (PSW). PSW is an 8-bit SFR where each bit can be programmed as required. Bits are designated from PSW.0 to PSW.7. PSW.3 and PSW.4 are used to select register banks. Now, take a look at the following illustration to get a clear understanding of how it works. Opcode EC is used for MOV A, R4. The opcode is stored at the address 0202 and when it is executed, the control goes directly to R4 of the respected register bank (that is selected in PSW). If register bank #0 is selected, then the data from R4 of register bank #0 will be moved to the accumulator. Here 2F is stored at 04H. 04H represents the address of R4 of register bank #0. Data (2F) movement is highlighted in bold. 2F is getting transferred to the accumulator from data memory location 0C H and is shown as dotted line. 0CH is the address location of Register 4 (R4) of register bank #1. The instruction above is 1 byte and requires 1 cycle for complete execution. What it means is, you can save program memory by using register direct addressing mode. Register Indirect Addressing Mode In this addressing mode, the address of the data is stored in the register as operand. MOV A, @R0 Here the value inside R0 is considered as an address, which holds the data to be transferred to the accumulator. Example: If R0 has the value 20H, and data 2FH is stored at the address 20H, then the value 2FH will get transferred to the accumulator after executing this instruction. See the following illustration. So the opcode for MOV A, @R0 is E6H. Assuming that the register bank #0 is selected, the R0 of register bank #0 holds the data 20H. Program control moves to 20H where it locates the data 2FH and it transfers 2FH to the accumulator. This is a 1-byte instruction and the program counter increments by 1 and moves to 0203 of the program memory. Note − Only R0 and R1 are allowed to form a register indirect addressing instruction. In other words, the programmer can create an instruction either using @R0 or @R1. All register banks are allowed. Indexed Addressing Mode We will take two examples to understand the concept of indexed addressing mode. Take a look at the following instructions − MOVC A, @A+DPTR and MOVC A, @A+PC where DPTR is the data pointer and PC is the program counter (both are 16-bit registers). Consider the first example. MOVC A, @A+DPTR The source operand is @A+DPTR. It contains the source data from this location. Here we are adding the contents of DPTR with the current content of the accumulator. This addition will give a new address which is the address

Learning ES – Interrupts work project make money

Embedded Systems – Interrupts An interrupt is a signal to the processor emitted by hardware or software indicating an event that needs immediate attention. Whenever an interrupt occurs, the controller completes the execution of the current instruction and starts the execution of an Interrupt Service Routine (ISR) or Interrupt Handler. ISR tells the processor or controller what to do when the interrupt occurs. The interrupts can be either hardware interrupts or software interrupts. Hardware Interrupt A hardware interrupt is an electronic alerting signal sent to the processor from an external device, like a disk controller or an external peripheral. For example, when we press a key on the keyboard or move the mouse, they trigger hardware interrupts which cause the processor to read the keystroke or mouse position. Software Interrupt A software interrupt is caused either by an exceptional condition or a special instruction in the instruction set which causes an interrupt when it is executed by the processor. For example, if the processor”s arithmetic logic unit runs a command to divide a number by zero, to cause a divide-by-zero exception, thus causing the computer to abandon the calculation or display an error message. Software interrupt instructions work similar to subroutine calls. What is Polling? The state of continuous monitoring is known as polling. The microcontroller keeps checking the status of other devices; and while doing so, it does no other operation and consumes all its processing time for monitoring. This problem can be addressed by using interrupts. In the interrupt method, the controller responds only when an interruption occurs. Thus, the controller is not required to regularly monitor the status (flags, signals etc.) of interfaced and inbuilt devices. Interrupts v/s Polling Here is an analogy that differentiates an interrupt from polling − Interrupt Polling An interrupt is like a shopkeeper. If one needs a service or product, he goes to him and apprises him of his needs. In case of interrupts, when the flags or signals are received, they notify the controller that they need to be serviced. The polling method is like a salesperson. The salesman goes from door to door while requesting to buy a product or service. Similarly, the controller keeps monitoring the flags or signals one by one for all devices and provides service to whichever component that needs its service. Interrupt Service Routine For every interrupt, there must be an interrupt service routine (ISR), or interrupt handler. When an interrupt occurs, the microcontroller runs the interrupt service routine. For every interrupt, there is a fixed location in memory that holds the address of its interrupt service routine, ISR. The table of memory locations set aside to hold the addresses of ISRs is called as the Interrupt Vector Table. Interrupt Vector Table There are six interrupts including RESET in 8051. Interrupts ROM Location (Hex) Pin Interrupts ROM Location (HEX) Serial COM (RI and TI) 0023 Timer 1 interrupts(TF1) 001B External HW interrupt 1 (INT1) 0013 P3.3 (13) External HW interrupt 0 (INT0) 0003 P3.2 (12) Timer 0 (TF0) 000B Reset 0000 9 When the reset pin is activated, the 8051 jumps to the address location 0000. This is power-up reset. Two interrupts are set aside for the timers: one for timer 0 and one for timer 1. Memory locations are 000BH and 001BH respectively in the interrupt vector table. Two interrupts are set aside for hardware external interrupts. Pin no. 12 and Pin no. 13 in Port 3 are for the external hardware interrupts INT0 and INT1, respectively. Memory locations are 0003H and 0013H respectively in the interrupt vector table. Serial communication has a single interrupt that belongs to both receive and transmit. Memory location 0023H belongs to this interrupt. Steps to Execute an Interrupt When an interrupt gets active, the microcontroller goes through the following steps − The microcontroller closes the currently executing instruction and saves the address of the next instruction (PC) on the stack. It also saves the current status of all the interrupts internally (i.e., not on the stack). It jumps to the memory location of the interrupt vector table that holds the address of the interrupts service routine. The microcontroller gets the address of the ISR from the interrupt vector table and jumps to it. It starts to execute the interrupt service subroutine, which is RETI (return from interrupt). Upon executing the RETI instruction, the microcontroller returns to the location where it was interrupted. First, it gets the program counter (PC) address from the stack by popping the top bytes of the stack into the PC. Then, it start to execute from that address. Edge Triggering vs. Level Triggering Interrupt modules are of two types − level-triggered or edge-triggered. Level Triggered Edge Triggered A level-triggered interrupt module always generates an interrupt whenever the level of the interrupt source is asserted. An edge-triggered interrupt module generates an interrupt only when it detects an asserting edge of the interrupt source. The edge gets detected when the interrupt source level actually changes. It can also be detected by periodic sampling and detecting an asserted level when the previous sample was de-asserted. If the interrupt source is still asserted when the firmware interrupt handler handles the interrupt, the interrupt module will regenerate the interrupt, causing the interrupt handler to be invoked again. Edge-triggered interrupt modules can be acted immediately, no matter how the interrupt source behaves. Level-triggered interrupts are cumbersome for firmware. Edge-triggered interrupts keep the firmware”s code complexity low, reduce the number of conditions for firmware, and provide more flexibility when interrupts are handled. Enabling and Disabling an Interrupt Upon Reset, all the interrupts are disabled even if they are activated. The interrupts must be enabled using software in order for the microcontroller to respond to those interrupts. IE (interrupt enable) register is responsible for enabling and disabling the interrupt. IE is a bitaddressable register. Interrupt Enable Register EA – ET2 ES ET1 EX1 ET0 EX0 EA − Global enable/disable. – − Undefined. ET2 − Enable Timer 2 interrupt. ES − Enable

Learning ES – Registers work project make money

Embedded Systems – Registers Registers are used in the CPU to store information on temporarily basis which could be data to be processed, or an address pointing to the data which is to be fetched. In 8051, there is one data type is of 8-bits, from the MSB (most significant bit) D7 to the LSB (least significant bit) D0. With 8-bit data type, any data type larger than 8-bits must be broken into 8-bit chunks before it is processed. The most widely used registers of the 8051 are A (accumulator), B, R0-R7, DPTR (data pointer), and PC (program counter). All these registers are of 8-bits, except DPTR and PC. Storage Registers in 8051 We will discuss the following types of storage registers here − Accumulator R register B register Data Pointer (DPTR) Program Counter (PC) Stack Pointer (SP) Accumulator The accumulator, register A, is used for all arithmetic and logic operations. If the accumulator is not present, then every result of each calculation (addition, multiplication, shift, etc.) is to be stored into the main memory. Access to main memory is slower than access to a register like the accumulator because the technology used for the large main memory is slower (but cheaper) than that used for a register. The “R” Registers The “R” registers are a set of eight registers, namely, R0, R1 to R7. These registers function as auxiliary or temporary storage registers in many operations. Consider an example of the sum of 10 and 20. Store a variable 10 in an accumulator and another variable 20 in, say, register R4. To process the addition operation, execute the following command − ADD A,R4 After executing this instruction, the accumulator will contain the value 30. Thus “R” registers are very important auxiliary or helper registers. The Accumulator alone would not be very useful if it were not for these “R” registers. The “R” registers are meant for temporarily storage of values. Let us take another example. We will add the values in R1 and R2 together and then subtract the values of R3 and R4 from the result. MOV A,R3 ;Move the value of R3 into the accumulator ADD A,R4 ;Add the value of R4 MOV R5,A ;Store the resulting value temporarily in R5 MOV A,R1 ;Move the value of R1 into the accumulator ADD A,R2 ;Add the value of R2 SUBB A,R5 ;Subtract the value of R5 (which now contains R3 + R4) As you can see, we used R5 to temporarily hold the sum of R3 and R4. Of course, this is not the most efficient way to calculate (R1 + R2) – (R3 + R4), but it does illustrate the use of the “R” registers as a way to store values temporarily. The “B” Register The “B” register is very similar to the Accumulator in the sense that it may hold an 8-bit (1-byte) value. The “B” register is used only by two 8051 instructions: MUL AB and DIV AB. To quickly and easily multiply or divide A by another number, you may store the other number in “B” and make use of these two instructions. Apart from using MUL and DIV instructions, the “B” register is often used as yet another temporary storage register, much like a ninth R register. The Data Pointer The Data Pointer (DPTR) is the 8051’s only user-accessible 16-bit (2-byte) register. The Accumulator, R0–R7 registers and B register are 1-byte value registers. DPTR is meant for pointing to data. It is used by the 8051 to access external memory using the address indicated by DPTR. DPTR is the only 16-bit register available and is often used to store 2-byte values. The Program Counter The Program Counter (PC) is a 2-byte address which tells the 8051 where the next instruction to execute can be found in the memory. PC starts at 0000h when the 8051 initializes and is incremented every time after an instruction is executed. PC is not always incremented by 1. Some instructions may require 2 or 3 bytes; in such cases, the PC will be incremented by 2 or 3. Branch, jump, and interrupt operations load the Program Counter with an address other than the next sequential location. Activating a power-on reset will cause all values in the register to be lost. It means the value of the PC is 0 upon reset, forcing the CPU to fetch the first opcode from the ROM location 0000. It means we must place the first byte of upcode in ROM location 0000 because that is where the CPU expects to find the first instruction. The Stack Pointer (SP) The Stack Pointer, like all registers except DPTR and PC, may hold an 8-bit (1-byte) value. The Stack Pointer tells the location from where the next value is to be removed from the stack. When a value is pushed onto the stack, the value of SP is incremented and then the value is stored at the resulting memory location. When a value is popped off the stack, the value is returned from the memory location indicated by SP, and then the value of SP is decremented. This order of operation is important. SP will be initialized to 07h when the 8051 is initialized. If a value is pushed onto the stack at the same time, the value will be stored in the internal RAM address 08h because the 8051 will first increment the value of SP (from 07h to 08h) and then will store the pushed value at that memory address (08h). SP is modified directly by the 8051 by six instructions: PUSH, POP, ACALL, LCALL, RET, and RETI. ROM Space in 8051 Some family members of 8051 have only 4K bytes of on-chip ROM (e.g. 8751, AT8951); some have 8K ROM like AT89C52, and there are some family members with 32K bytes and 64K bytes of on-chip ROM such as Dallas Semiconductor. The point to remember is that no member of the 8051 family can access more than 64K bytes of opcode