Makefile – Directives

Makefile – Directives ”; Previous Next There are numerous directives available in various forms. The make program on your system may not support all the directives. So please check if your make supports the directives we are explaining here. GNU make supports these directives. Conditional Directives The conditional directives are − The ifeq directive begins the conditional, and specifies the condition. It contains two arguments, separated by a comma and surrounded by parentheses. Variable substitution is performed on both arguments and then they are compared. The lines of the makefile following the ifeq are obeyed if the two arguments match; otherwise they are ignored. The ifneq directive begins the conditional, and specifies the condition. It contains two arguments, separated by a comma and surrounded by parentheses. Variable substitution is performed on both arguments and then they are compared. The lines of the makefile following the ifneq are obeyed if the two arguments do not match; otherwise they are ignored. The ifdef directive begins the conditional, and specifies the condition. It contains single argument. If the given argument is true then condition becomes true. The ifndef directive begins the conditional, and specifies the condition. It contains single argument. If the given argument is false then condition becomes true. The else directive causes the following lines to be obeyed if the previous conditional failed. In the example above this means the second alternative linking command is used whenever the first alternative is not used. It is optional to have an else in a conditional. The endif directive ends the conditional. Every conditional must end with an endif. Syntax of Conditionals Directives The syntax of a simple conditional with no else is as follows − conditional-directive text-if-true endif The text-if-true may be any lines of text, to be considered as part of the makefile if the condition is true. If the condition is false, no text is used instead. The syntax of a complex conditional is as follows − conditional-directive text-if-true else text-if-false endif If the condition is true, text-if-true is used; otherwise, text-if-false is used. The text-if-false can be any number of lines of text. The syntax of the conditional-directive is the same whether the conditional is simple or complex. There are four different directives that test various conditions. They are as given − ifeq (arg1, arg2) ifeq ”arg1” ”arg2” ifeq “arg1” “arg2” ifeq “arg1″ ”arg2” ifeq ”arg1” “arg2″ Opposite directives of the above conditions are are follows − ifneq (arg1, arg2) ifneq ”arg1” ”arg2” ifneq “arg1” “arg2” ifneq “arg1″ ”arg2” ifneq ”arg1” “arg2″ Example of Conditionals Directives libs_for_gcc = -lgnu normal_libs = foo: $(objects) ifeq ($(CC),gcc) $(CC) -o foo $(objects) $(libs_for_gcc) else $(CC) -o foo $(objects) $(normal_libs) endif The include Directive The include directive allows make to suspend reading the current makefile and read one or more other makefiles before continuing. The directive is a line in the makefile that looks follows − include filenames… The filenames can contain shell file name patterns. Extra spaces are allowed and ignored at the beginning of the line, but a tab is not allowed. For example, if you have three `.mk” files, namely, `a.mk”, `b.mk”, and `c.mk”, and $(bar) then it expands to bish bash, and then the following expression. include foo *.mk $(bar) is equivalent to: include foo a.mk b.mk c.mk bish bash When the make processes an include directive, it suspends reading of the makefile and reads from each listed file in turn. When that is finished, make resumes reading the makefile in which the directive appears. The override Directive If a variable has been set with a command argument, then ordinary assignments in the makefile are ignored. If you want to set the variable in the makefile even though it was set with a command argument, you can use an override directive, which is a line that looks follows− override variable = value or override variable := value Print Page Previous Next Advertisements ”;

Makefile – Quick Guide

Makefile – Quick Guide ”; Previous Next Why Makefile? Compiling the source code files can be tiring, especially when you have to include several source files and type the compiling command every time you need to compile. Makefiles are the solution to simplify this task. Makefiles are special format files that help build and manage the projects automatically. For example, let’s assume we have the following source files. main.cpp hello.cpp factorial.cpp functions.h main.cpp The following is the code for main.cpp source file − #include <iostream> using namespace std; #include “functions.h” int main(){ print_hello(); cout << endl; cout << “The factorial of 5 is ” << factorial(5) << endl; return 0; } hello.cpp The code given below is for hello.cpp source file − #include <iostream> using namespace std; #include “functions.h” void print_hello(){ cout << “Hello World!”; } factorial.cpp The code for factorial.cpp is given below − #include “functions.h” int factorial(int n){ if(n!=1){ return(n * factorial(n-1)); } else return 1; } functions.h The following is the code for fnctions.h − void print_hello(); int factorial(int n); The trivial way to compile the files and obtain an executable, is by running the command − gcc main.cpp hello.cpp factorial.cpp -o hello This command generates hello binary. In this example we have only four files and we know the sequence of the function calls. Hence, it is feasible to type the above command and prepare a final binary. However, for a large project where we have thousands of source code files, it becomes difficult to maintain the binary builds. The make command allows you to manage large programs or groups of programs. As you begin to write large programs, you notice that re-compiling large programs takes longer time than re-compiling short programs. Moreover, you notice that you usually only work on a small section of the program ( such as a single function ), and much of the remaining program is unchanged. In the subsequent section, we see how to prepare a makefile for our project. Makefile – Macros The make program allows you to use macros, which are similar to variables. Macros are defined in a Makefile as = pairs. An example has been shown below − MACROS = -me PSROFF = groff -Tps DITROFF = groff -Tdvi CFLAGS = -O -systype bsd43 LIBS = “-lncurses -lm -lsdl” MYFACE = “:*)” Special Macros Before issuing any command in a target rule set, there are certain special macros predefined − $@ is the name of the file to be made. $? is the names of the changed dependents. For example, we could use a rule as follows − hello: main.cpp hello.cpp factorial.cpp $(CC) $(CFLAGS) $? $(LDFLAGS) -o $@ Alternatively: hello: main.cpp hello.cpp factorial.cpp $(CC) $(CFLAGS) [email protected] $(LDFLAGS) -o $@ In this example, $@ represents hello and $? or [email protected] picks up all the changed source files. There are two more special macros used in the implicit rules. They are − $< the name of the related file that caused the action. $* the prefix shared by target and dependent files. Common implicit rule is for the construction of .o (object) files out of .cpp (source files). .cpp.o: $(CC) $(CFLAGS) -c $< Alternatively: .cpp.o: $(CC) $(CFLAGS) -c $*.c Conventional Macros There are various default macros. You can see them by typing “make -p” to print out the defaults. Most are pretty obvious from the rules in which they are used. These predefined variables, i.e., macros used in implicit rules fall into two classes. They are as follows − Macros that are names of programs (such as CC) Macros that contain arguments of the programs (such as CFLAGS). Below is a table of some of the common variables used as names of programs in built-in rules of makefiles − Sr.No Variables & Description 1 AR Archive-maintaining program; default is `ar”. 2 AS Program to compiling assembly files; default is `as”. 3 CC Program to compiling C programs; default is `cc”. 4 CO Program to checking out files from RCS; default is `co”. 5 CXX Program to compiling C++ programs; default is `g++”. 6 CPP Program to running the C preprocessor, with results to standard output; default is `$(CC) -E”. 7 FC Program to compiling or preprocessing Fortran and Ratfor programs; default is `f77”. 8 GET Program to extract a file from SCCS; default is `get”. 9 LEX Program to use to turn Lex grammars into source code; default is `lex”. 10 YACC Program to use to turn Yacc grammars into source code; default is `yacc”. 11 LINT Program to use to run lint on source code; default is `lint”. 12 M2C Program to use to compile Modula-2 source code; default is `m2c”. 13 PC Program for compile Pascal programs; default is `pc”. 14 MAKEINFO Program to convert a Texinfo source file into an Info file; default is `makeinfo”. 15 TEX Program to make TeX dvi files from TeX source; default is `tex”. 16 TEXI2DVI Program to make TeX dvi files from Texinfo source; default is `texi2dvi”. 17 WEAVE Program to translate Web into TeX; default is `weave”. 18 CWEAVE Program to translate C Web into TeX; default is `cweave”. 19 TANGLE Program to translate Web into Pascal; default is `tangle”. 20 CTANGLE Program to translate C Web into C; default is `ctangle”. 21 RM Command to remove a file; default is `rm -f”. Here is a table of variables whose values are additional arguments for the programs above. The default values for all of these is the empty string, unless otherwise noted. Sr.No. Variables & Description 1 ARFLAGS Flags to give the archive-maintaining program; default is `rv”. 2 ASFLAGS Extra flags to give to the assembler when explicitly invoked on a `.s” or `.S” file. 3 CFLAGS Extra flags to give to the C compiler. 4 CXXFLAGS Extra flags to give to the C compiler. 5 COFLAGS Extra flags to give to the RCS co program. 6 CPPFLAGS Extra flags to give to the C preprocessor and programs, which use it (such as C

Makefile – Dependencies

Defining Dependencies in Makefile ”; Previous Next It is very common that a final binary will be dependent on various source code and source header files. Dependencies are important because they let the make Known about the source for any target. Consider the following example − hello: main.o factorial.o hello.o $(CC) main.o factorial.o hello.o -o hello Here, we tell the make that hello is dependent on main.o, factorial.o, and hello.o files. Hence, whenever there is a change in any of these object files, make will take action. At the same time, we need to tell the make how to prepare .o files. Hence we need to define those dependencies also as follows − main.o: main.cpp functions.h $(CC) -c main.cpp factorial.o: factorial.cpp functions.h $(CC) -c factorial.cpp hello.o: hello.cpp functions.h $(CC) -c hello.cpp Print Page Previous Next Advertisements ”;

Makefile – Home

Unix Makefile Tutorial PDF Version Quick Guide Resources Job Search Discussion Makefile is a program building tool which runs on Unix, Linux, and their flavors. It aids in simplifying building program executables that may need various modules. To determine how the modules need to be compiled or recompiled together, make takes the help of user-defined makefiles. This tutorial should enhance your knowledge about the structure and utility of makefile. Audience Makefile guides the make utility while compiling and linking program modules. Anyone who wants to compile their programs using the make utility and wants to gain knowledge on makefile should read this tutorial. Prerequisites This tutorial expects good understanding of programming language such as C and C++. The reader is expected to have knowledge of linking, loading concepts, and how to compile and execute programs in Unix/Linux environment. Print Page Previous Next Advertisements ”;

Makefile – Discussion

Discuss Makefile ”; Previous Next Makefile is a program building tool which runs on Unix, Linux, and their flavors. It aids in simplifying building program executables that may need various modules. To determine how the modules need to be compiled or recompiled together, make takes the help of user-defined makefiles. This tutorial should enhance your knowledge about the structure and utility of makefile. Print Page Previous Next Advertisements ”;