Three Variable K-Map

3 Variable K-Map in Digital Electronics ”; Previous Next A K-Map or Karnaugh Map is a graphical method that used for simplifying the complex algebraic expressions in Boolean functions. This method avoid the use of complex theorems and equations manipulations. A K-Map is basically a special form of a truth table that can easily map out the values of parameters and gives a simplified Boolean expression. K-Map method is best suited for such Boolean functions that have two to four variables. However, it can be used for Boolean functions having five or six variables as well, but its process becomes more difficult with the increased number of variables in the function. Therefore, in practice, we mostly use Two-Variable K-Map, Three-Variable K-Map, and Four-Variable K-Map. But, sometimes, the Five-Variable K-Map and Six-Variable K-Map are also used to derive the Boolean expressions. Here, we will discuss the 3 Variable K-Map and its application to simplify a complex Boolean function. Three-Variable K-Map We can use the K-Map to simplify a Boolean function of three-variables. A Boolean function in three variables (A, B, C) can be expressed in the standard sum of product (SOP) form that can have total eight possible combinations, which are as follows − $$\mathrm{(A”B”C”), (A”B”C), (A”BC”), (A”BC), (AB”C”), (AB”C), (ABC”), (ABC)}$$ We can designate each of these combinations by m0, m1, m2, m3, m4, m5, m6, and m7 respectively. Each of these terms are called a min-term. In these combinations, A is called MSB (Most Significant Bit) and C is called LSB (Least Significant Bit). In terms of POS (Product of Sum) form, the eight possible combinations of the three variables Boolean expression are as follows − $$\mathrm{(A+B+C), (A+B+C”), (A+B”+C), (A+B”+C”), (A”+B+C), (A”+B+C”), (A”+B”+C), (A”+B”+C”)}$$ Each one of these combinations are often designated by M0, M1, M2, M3, M4, M5, M6, and M7 respectively. Each of these terms is called a maxterm. Similar to the minterm, A is called MSB (Most Significant Bit) and C is called LSB (Least Significant Bit). Therefore, a three variable K-Map has eight (23) squares or cells, and each square on the K-Map represents a minterm of a maxterm as shown in the following figure. Here, the small number on the bottom right corner of each cell indicates the minterm or maxterm designation. The binary numbers along the top of the K-Map indicates the condition of variables B and C for each column. The binary number along the left side of the map against each row represents the condition of the variable A for that row. For example, the binary number of 10 on the top of the fourth column in the above figure indicates that the variable B appears in non-complimented form and the variable C appears in complimented form in all the minterms in that column. The binary number 0 on the left of the first row on the K-map indicates that the variable A appears in its complimented form in all the minterms, and the binary number 1 on the left of the second row on the K-Map indicates that the variable A appears in its non-complimented form in all the minterms. Also, note that the binary numbers on top of the K-map are not in the normal binary order, but they are actually in the Gray code. The use of Gray code in K-map ensures that the two physically adjacent cells are actually adjacent which means their minterms or maxterms differs by one variable only. Numerical Example Map the following three-variable Boolean expression on K-Map. $$\mathrm{f \: = \: \overline{A} \: \overline{B} \: C \: + \: A \: \overline{B} \: C \: + \: \overline{A} \: B \: \overline{C} \: + \: A \: \overline{B} \: \overline{C} \: + \: A \: B \: C}$$ Solution In the given Boolean expression, the minterms are − $$\mathrm{\overline{A} \: \overline{B} \: C \: = \: 001; \: A \: \overline{B} \: C \: = \: 101; \: \overline{A} \: B \: \overline{C} \: = \: 010; \: A \: \overline{B} \: \overline{C} \: = \: 100; \: ABC \: = \: 111}$$ Therefore, $$\mathrm{m_{1} \: = \: \overline{A} \: \overline{B} \: C \: = \: 001}$$ $$\mathrm{m_{5} \: = \: A \: \overline{B} \: C \: = \: 101}$$ $$\mathrm{m_{2} \: = \: \overline{A} \: B \: \overline{C} \: = \: 010}$$ $$\mathrm{m_{4} \: = \: A \: \overline{B} \: \overline{C} \: = \: 100}$$ $$\mathrm{m_{7} \: = \: ABC \: = \: 111}$$ Hence, the expression is given by, $$\mathrm{f \: = \: \sum \: m (1, \: 5, \: 2, \: 4, \: 7)}$$ The K-map of this expression is shown in the following figure − Conclusion From the above discussion, we may conclude that the three variable K-Map is a graphical method used to simplify the complex three variable Boolean function. A three-variable Kmap has eight squares or cells. Print Page Previous Next Advertisements ”;

DeMorgan”s Theorem

Digital Electronics – DeMorgan”s Theorem ”; Previous Next In Boolean algebra, several rules are defined to perform operations in digital logic circuits. Boolean algebra is a tool to perform operation on binary digits, i.e. 0 and 1. These two binary digits 0 and 1 are used to denote FALSE and TRUE states of a digital circuit at input and output ends. Boolean algebra, developed by George Boole, uses 0s and 1s to create truth tables and logic expressions of digital circuits like AND, OR, NOT, etc. which are used to analyze and simplify the complex circuits. There were another English mathematician Augustus DeMorgan who explained the NAND and NOR operations as NOT AND and NOT OR operations respectively. This explanation was named De Morgan”s Theorem. In this tutorial, we will discuss the DeMorgan”s theorem in detail. What is DeMorgan”s Theorem? DeMorgan”s Theorem is a powerful theorem in Boolean algebra which has a set of two rules or laws. These two laws were developed to show the relationship between two variable AND, OR, and NOT operations. These two rules enable the variables to be negated, i.e. opposite of their original form. Therefore, DeMorgan”s theorem gives the dual of a logic function. Now, let us discuss the two laws of DeMorgan”s theorem. DeMorgan”s First Theorem (Law 1) DeMorgan”s First Law states that the complement of a sum (ORing) of variables is equal to the product (ANDing) of their individual complements. In other words, the complement of two or more ORed variables is equivalent to the AND of the complements of each of the individual variables, i.e. $$\mathrm{\overline{A+B} \: = \: \bar{A} cdot \bar{B}}$$ Or, it may also be represented as, $$\mathrm{\lgroup A \: + \: B \rgroup” \: = \: A”cdot B”}$$ The logic implementation of left side and right side of this law is shown in Figure 1. Thus, DeMorgan”s first law proves that the NOR gate is equivalent to a bubbled AND gate. The following truth table shows the proof of this law. Left Side Right Side Input Output Input Output A B (A + B)” A” B” A”· B” 0 0 1 1 1 1 0 1 0 1 0 0 1 0 0 0 1 0 1 1 0 0 0 0 This truth table proves that the Boolean expression on the left is equivalent to that on the right side of the expression of DeMorgan”s first law. Also, the first law of DeMorgan”s theorem can be extended to any number of variables, or a combination of variables. For example, $$\mathrm{\overline{A \: + \: B \: + \: C \: + \: D \: + \: E \: + \: \dotso} \: = \: \bar{A} \: \bar{B} \: \bar{C} \: \bar{D} \: \bar{E} \: \dotso}$$ Also, $$\mathrm{\overline{ABC \: + \: DE \: + \: FGH \: + \: \dotso}\: = \: \overline{\lgroup ABC \rgroup}.\overline{\lgroup DE \rgroup}.\overline{\lgroup FGH\rgroup}.\dotso}$$ From the above discussion, we may conclude that the DeMorgan”s First Law converts an expression from a sum form under a NOT sign to a product form. DeMorgan”s Second Theorem (Law 2) DeMorgan”s second law states that the complement of the product (ANDing) of variables is equivalent to the sum (ORing) of their individual complements. In other words, the complement of two or more ANDed variables is equal to the sum of the complement of each of the individual variables, i.e., $$\mathrm{\overline{AB} \: = \: \overline{A} \: + \: \overline{B}}$$ It may also be represented as, $$\mathrm{\lgroup AB \rgroup” \: = \: A” \: + \: B”}$$ The logic implementation of left and right sides of this expression is shown in Figure 2. Hence, DeMorgan”s second law proves that the NAND gate is equivalent to a bubbled OR gate. The following truth table shows the proof of this law. Left Side Right Side Input Output Input Output A B AB A” B” A” + B” 0 0 0 1 1 1 0 1 1 1 0 1 1 0 1 0 1 1 1 1 1 0 0 0 This truth table proves that the Boolean expression on the left side is equivalent to that on the right side of the expression of DeMorgan”s second law. Similar to the first law, we may extend the DeMorgan”s second law for any number of variables or combination of variables. For example, $$\mathrm{\overline{ABCDE \dotso} \: = \: \overline{A} \: + \: \overline{B} \: + \: \overline{C} \: + \: \overline{D} \: + \: \overline{E} \: + \: \dotso}$$ And, for a combination of variables, $$\mathrm{\overline{\lgroup ABC \rgroup} \overline{\lgroup DE \rgroup} \overline{\lgroup FG \rgroup \dotso} \: = \: \overline{ABC} \: + \: \overline{DE} \: + \: \overline{FG}}$$ Hence, from the above discussion, we can conclude that DeMorgan”s second law transforms a product form of variables or combination of variables under a NOT sign into a sum form. Therefore, DeMorgan”s laws transforms an AND operation into an OR operation, and an OR operation into an AND operation. This principle is called duality. Example 1 Apply DeMorgan”s theorem to the following Boolean expression, $$\mathrm{F \: = \: \overline{AB \overline{ \lgroup C \: +

Laws of Boolean Algebra

Laws of Boolean Algebra ”; Previous Next Boolean algebra is a mathematical tool that deals with logical operations and binary number system. It builds the foundation of digital electronics and computer science. The laws and rules in Boolean algebra are the sets of logical statements or expressions upon which all the logical expressions are built. Each law of the Boolean algebra can be interpreted as an operation performed by a logic circuit like a logic gate. In this chapter, we will learn about laws and rules of Boolean algebra that are used to simplify the logical functions and Boolean expressions. These laws and rules are essential tools in Boolean algebra that help to reduce the complexity and optimize the digital circuits and systems. Let us learn the primary laws and rules of Boolean algebra in detail that are used to perform logical operations. Laws of Boolean Algebra All the important laws and rules of Boolean algebra are explained below − Rules of Logical Operations There are three basic logical operations namely, AND, OR, and NOT. The following table highlights the rules associated with these three logical operations − AND Operation OR Operation NOT Operation 0 AND 0 = 0 0 OR 0 = 0 NOT of 0 = 1 0 AND 1 = 0 0 OR 1 = 1 NOT of 1 = 0 1 AND 0 = 0 1 OR 0 = 1 1 AND 1 = 1 1 OR 1 = 1 These rules of Boolean algebra can be implemented using logic gates. AND Laws In Boolean algebra, there are four AND laws given below − Law 1 − A · 0 = 0 (This law is called null law). Law 2 − A · 1 = A (This law is called identity law). Law 3 − A · A = A Law 4 − A · A” = 0 OR Laws There are four OR laws described below − Law 1 − A + 0 = A (This law is called null law). Law 2 − A + 1 = 1 (This law is called identity law). Law 3 − A + A = A Law 4 − A + A” = 1 Complementation Laws There are following five complementation laws in Boolean algebra − Law 1 − 0” = 1 Law 2 − 1” = 0 Law 3 − If A = 0, Then A” = 1 Law 4 − If A = 1, Then A” = 0 Law 5 − (A”)” = A (This is called double complementation law) Commutative Laws There are following two commutative laws in Boolean algebra − Law 1 − According to this law, the operation A OR B produces the same output as the operation B OR A, i.e., A + B = B + A Hence, the order of the variables does not affect the OR operation. This law can be extended to any number of variables. For example, for three variables, it will be, A + B + C = C + B + A = B + C + A = C + A + B Law 2 − According to this law, the output of the A AND B operation is same as that of the B AND A operation, i.e., A · B = B · A This law states that the order in which the variables are ANDed does not affect the result. We can extend this law to any number of variables. For example, for three variables, we get, A · B · C = A · C · B = C · B · A = C · A · B Associative Laws Associative laws define the ways of grouping the variables. There are two associative laws as described below. Law 1 − The expression A OR B ORed with C results the same as the A Ored with B OR C, i.e., (A + B) + C = A + (B + C) This law can be extended to any number of variables. For example, for 4 variables, we get, (A + B + C) + D = A + (B + C + D) = (A + B) + (C + D) Law 2 − The expression A AND B ANDed with C results the same as the expression A ANDed with B AND C, i.e., (A · B) · C = A · (B · C) We can extend this law to any number of variables. For example, if we have 4 variables, then (ABC)D = A(BCD) = (AB)·(CD) Distributive Laws In Boolean algebra, there are the following two distributive laws that allow for multiplying or factoring out of expressions. Law 1 − According to this law, we OR several variables and then AND the result with a single variable. It gives the same result as the expression in which the single variable is ANDed with each of the several variables and then ORed the product terms, i.e., A · (B + C) = AB + AC We can extend this law to any number of variables. For example, A(BC + DE) = ABC + ADE AB(CD + EF) = ABCD + ABEF Law 2 − According to this law, if we AND several variables and then the result is ORed with a single variable. It gives the same result as we OR the single variable with each

Decoders

Digital Electronics – Decoders ”; Previous Next What is a Decoder? In digital electronics, a combinational logic circuit that converts an N-bit binary input code into M output channels in such a way that only one output channel is activated for each one of the possible combinations of inputs is known as a decoder. In other words, a combinational logic circuit which converts N input lines into a maximum of 2N output lines is called a decoder. Therefore, a decoder is a combination logic circuit that is capable of identifying or detecting a particular code. The operation that a decoder performs is referred to as decoding. A general block diagram of a decoder is shown in Figure-1. Here, the decoder has N input lines and M (2N) output lines. In a decoder, each of the N input lines can be a 0 or a 1, hence the number of possible input combinations or codes be equal to 2N. For each of these input combinations, only one of the M output lines will be active, and all other output lines will remain inactive. Types of Decoders There are several types of decoder present. But, based on the input and output lines present, decoders may classified into the following three types − 2 to 4 Decoder 3 to 8 Decoder 4 to 16 Decoder Now, let us discuss each type of decoder in detail one by one. 2 to 4 Decoder The 2 to 4 decoder is one that has 2 input lines and 4 (22) output lines. The functional block diagram of the 2 to 4 decoder is shown in Figure-2. When this decoder is enabled with the help of enable input E, then its one of the four outputs will be active for each combination of inputs. The operation of this 2-line to 4-line decoder can be analyzed with the help of its truth table which is given below. Inputs Outputs E A B Y3 Y2 Y1 Y0 0 X X 0 0 0 0 1 0 0 0 0 0 1 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 1 1 1 0 0 0 Using this truth table, we can derive the Boolean expression for each output as follows − $$\mathrm{Y_{0} \: = \: E \: \cdot \: \bar{A} \: \cdot \: \bar{B}}$$ $$\mathrm{Y_{1} \: = \: E \: \cdot \: \bar{A} \: \cdot \: B}$$ $$\mathrm{Y_{2} \: = \: E \: \cdot \: A \: \cdot \: \bar{B}}$$ $$\mathrm{Y_{3} \: = \: E \: \cdot \: A \: \cdot \: B}$$ As each output term contains products of input variables that can be implemented with the help of AND gates. Therefore, the logic circuit diagram of the 2 to 4 decoder is shown in Figure-3. Operation The operation of logic circuit of the 2 to 4 decoder is described as follows − When enable input (E) is inactive, i.e. set to 0, none of the AND gates will function. When enable input (E) is made active by setting it to 1, then the circuit works as explained below. When A = 0 and B = 0, the AND gate 1 becomes active and produces output Y0. When A = 0 and B = 1, the AND gate 2 becomes active and produces output Y1. When A = 1 and B = 0, the AND gate 3 becomes active and produces output Y2. When A = 1 and B = 1, the AND gate 4 becomes active and produces output Y3. 3 to 8 Decoder The 3 to 8 decoder is one that has 3 input lines and 8 (23) output lines. The functional block diagram of the 3 to 8 decoder is shown in Figure-4. When this decoder is enabled with the help of enable input E, then it”s one of the eight outputs will be active for each combination of inputs. The operation of this 3-line to 8-line decoder can be analyzed with the help of its function table which is given below. Inputs Outputs E A B C Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 0 X X X 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 0 0 1 0 1 1 0 0 0 0 1 0 0 0 1 1 0 0 0 0 0 1 0 0 0 0 1 1 0 1 0 0 1 0 0 0 0 0 1

Simplification using Boolean Algebra

Simplifications of Boolean Algebra ”; Previous Next What is a Karnaugh Map (K-Map)? K-Map is a graphical tool used for simplifying Boolean expressions represented in their standard form to obtain their minimal form. The K-Map is basically a graph or chart that composed of an arrangement of adjacent cells or squares, where each cell represents a particular combination of variables of the function either in sum or product form. The number of cells in the K-Map depends upon number of variables in the Boolean function, i.e., K-map has 2n adjacent cells, where n is the number of variables in the Boolean expression. Therefore, the number of cells in a 2 variable K-map are 4 (22), in 3 variable KMap, the number of cells are 8 (23), in 4 variable K-map, the number of cells are 16 (24), and so on. However, we can use the K Map for any number of variables. But, for simplifying Boolean functions in variables more than 5, it becomes tedious. Now, let us discuss the procedure of simplifying a Boolean expression using K-Map. Steps to Simplify a Boolean Expression using K Map The following steps are involving in simplification of a given Boolean expression by using K-Map − Step 1 − Select a K-Map as per the number of variables in the given Boolean function. Step 2 − Identify the minterms (in SOP form) or maxterms (in POS form). Step 3 − For SOP (Sum of Products) Form, put 1s in cells of the K-Map with respect to the minterms of given function. Read the K-Map as follows − Read the K-map for 1s which are not adjacent to any other 1. These 1s are the isolated minterms, thus they are to be read as they are, because they cannot be combine in groups. Read the K-map for 1s which are adjacent only one other 1. Combine such minterms in 2-squares. Read the K-map for quads (4-squares), octets (8-squares), and so on of adjacent 1s even if they have some 1s which are already combined in other groups. The only thing to remember that they must geometrically form a rectangle or a square. Read the K-map for any 1s that have not been grouped yet and group them into bigger squares or rectangles if possible. Finally, obtain product terms of all the groups, and then sum up them to form the minimal SOP expression. For POS (Product of Sums) Form, put 0s in cells of the K-Map with respect to the maxterms of given function. Read the K-Map as follows − Read the K-map for 0s which are not adjacent to any other 0. These 0s are the isolated maxterms, thus they are to be read as they are, because they cannot be combine in groups. Read the K-map for 0s which are adjacent only one other 0. Combine such maxterms in 2-squares. Read the K-map for quads (4-squares), octets (8-squares), and so on of adjacent 0s even if they have some 0s which are already combined in other groups. The only thing to remember that they must geometrically form a rectangle or a square. Read the K-map for any 0s that have not been combined yet and combine them into bigger squares or rectangles if possible. Finally, obtain sum terms of all the groups, and then product them to form the minimal POS expression. Let us understand this procedure of simplifying Boolean expression using K-map with the help of some solved examples. Example 1 Simplify the following 3-variable Boolean function in SOP form using K-Map. $$\mathrm{F(P, \: Q, \:R) \: = \: \sum m ( 0, \: 1, \: 3, \: 5, \: 7)}$$ Solution The K-Map representation of the given Boolean function is shown in Figure-1. The simplification of this K-map is done as per the following steps − There are no isolated 1s. The minterm m1 forms a 4-square with minterms m3, m5, and m7. Make it and read it as R. The minterm m0 forms a 2-square with the minterm m1. Make it and read it as $\mathrm{\bar{P} \: \bar{Q}}$ Write all the product terms in SOP form. Thus, the simplified SOP expression is, $$\mathrm{F \: = \: R \: + \: \bar{P}\bar{Q}}$$ Example 2 Simplify the following 3-variable Boolean function in POS form using K-Map. $$\mathrm{F(A, \: B, \: C) \: = \: \Pi \: M(1, \: 2, \: 4, \: 6)}$$ Solution The POS K-map representation of the given Boolean function is shown in Figure-2. The simplification of this POS K-map is done as per the following steps − The maxterm M1 has no adjacency. Thus, keep it as it is and read it as $\mathrm{(A \: + \: B \: + \: \bar{C})}$. The maxterm M2 has only one adjacency M6. Hence, expand the maxterm M2 into a 2-square with the maxterm M6 and read the 2-square as $\mathrm{(\bar{B} \: + \: C)}$. The maxterm M4 also has only one adjacency M6. Hence, expand the maxterm M4 into a 2-square with the maxterm M6 and read the 2-square as $\mathrm{(\bar{A} \: + \: C)}$. Write all the sum terms in POS form. Therefore, the simplified POS expression is, $$\mathrm{F \: = \: (A \: + \: B \: + \: \bar{C}) \: (\bar{B} \: + \: C) \: (\bar{A} \: + \: C)}$$ Example 3 Simplify the following 4-variable Boolean function in SOP form to obtain the minimal SOP expression. $$\mathrm{F(A, \: B, \: C, \:D) \: = \: \sum \: m( 0,\: 1, \:3, \: 5, \: 7, \: 6, \: 10, \: 13, \: 14, \: 15)}$$ Solution

Number Systems

Digital Electronics – Number Systems ”; Previous Next A digital number system is a positional number system that has some symbols called digits. It provides a complete set of digits, operators, and rules to perform operations. In a digital number system, the number of digits used determines the base of the number system. For example, the binary number system has two digits (0 and 1), hence, the base of the binary number system is 2. Digital number systems form the foundation of the modern computing technologies and digital electronics. They are used to represent, process, and manipulate the information using a digital system. In this chapter, we will discuss the fundamental concepts of different types of digital number systems. Types of Digital Number Systems In digital electronics, the following four types of digital number systems are mainly used − Binary Number System Decimal Number System Octal Number System Hexadecimal Number System Let’s discuss each of these number systems in detail. Binary Number System Binary number system is the fundamental building block behind the implementation and working of all digital systems. Binary number system has two symbols or digits, i.e., 0 and 1. Hence, these two digits are used to represent information and perform all the digital operations. Each binary digit is called a bit. Since there are two digits are used in the binary number system, hence its base is 2. Therefore, the value of a binary number is calculated as the sum of powers of 2. Binary digits are used in digital system to represent their ON and OFF states. Where, 0 is used to represent the OFF state of the digital system and 1 is used to represent the ON state of the system. Overall, the binary number system forms the foundation of computation, digital communication, and digital information storage. Example Consider the binary number 1101.011. The integer part of this number is 1101 and the fractional part of this number is 0.011. The digits 1, 0, 1 and 1 of the integer part have weights of 20, 21, 22, 23 respectively. Similarly, the digits 0, 1 and 1 of fractional part have weights of 2-1, 2-2, 2-3 respectively. Mathematically, we can write it as, $$\mathrm{1101.011 \: = \: (1 \: \times \: 2^{3}) \: + \:(1 \: \times \: 2^{2}) \: + \: (0 \: \times \: 2^{1}) \: + \: (1 \: \times \: 2^{0}) \: + \: (0 \: \times \: 2^{−1}) \: + \: (1 \: \times \: 2^{−2}) \: + \: (1 \: \times \: 2^{−3})}$$ After simplifying the right-hand side terms, we will get a decimal number, which is an equivalent of binary number on left-hand side. Decimal Number System Decimal number system is not inherently a digital number system. But it is widely used to represent the digital information in a human readable format. Decimal number system is a base 10 number system having 10 unique digits i.e., 0, 1, 2, 3, 4, 5, 6, 7, 8, and 9. It is the standard number system used by human beings to represent information in a natural way. However, a digital system cannot directly process the information represented in decimal form, so it is converted into binary form and then processed. The base of the decimal number system is 10. So, the value of a decimal number is calculated by the sum of powers of 10. Example Consider the decimal number 1358.246. The integer part of this number is 1358 and the fractional part of this number is 0.246. The digits 8, 5, 3 and 1 have weights of (10)0, (10)1, (10)2 and (10)3 respectively. Similarly, the digits 2, 4 and 6 have weights of (10)-1, (10)-2 and (10)-3 respectively. Mathematically, we can write it as, $$\mathrm{1358.246 \: = \: (1 \: \times \: 10^{3}) \: + \:(3 \: \times \: 10^{2}) \: + \: (5 \: \times \: 10^{1}) \: + \: (8 \: \times \: 10^{0}) \: + \: (2 \: \times \: 10^{−1}) \: + \: (4 \: \times \: 10^{−2}) \: + \: (6 \: \times \: 10^{−3})}$$ After simplifying the right-hand side terms, we will get the decimal number, which is on the left-hand side. Octal Number System The octal number system is another type of digital number system used in the field of digital electronics to represent information. It is a base 8 number system having eight unique digits i.e., 0, 1, 2, 3, 4, 5, 6, and 7. It is important note that the octal number system is equivalent to 3-bit binary number system as 23 = 8. Hence, this number system can be used in computing and digital electronic applications. The value of an octal number is obtained by the sum of powers of 8, as 8 is the base of the octal number system. Octal number system is used in the field of digital electronics to represent binary information in compact form, permissions in Linux or Unix systems, IPv6 address, binary machine code instructions, in error detection algorithms, etc. Example Consider the octal number 1457.236. Integer part of this number is 1457 and fractional part of this number is 0.236. The digits 7, 5, 4 and 1 have weights of (8)0, (8)1, (8)2 and (8)3 respectively. Similarly, the digits 2, 3 and 6 have weights of (8)-1, (8)-2, (8)-3 respectively. Mathematically, we can write it as, $$\mathrm{1457.236 \: = \: (1 \: \times \: 8^{3}) \: + \:(4 \: \times \: 8^{2}) \: + \: (5 \: \times \: 8^{1}) \: + \: (7 \: \times \: 8^{0}) \: + \: (2 \: \times \: 8^{−1}) \: + \: (3 \: \times \: 8^{−2}) \: + \: (6 \: \times \: 8^{−3})}$$ After simplifying the

Five Variable K-Map

5 Variable K-Map in Digital Electronics ”; Previous Next K-Map or Karnaugh Map is a simplification technique used to minimize a given complex Boolean function. K-Map or Karnaugh Map is a graph or chart which is composed of an arrangement of adjacent cells, where each cell of the K-Map represents a particular combination of variables in either sum or product form. The K-map can be used to simplify Boolean functions involving any number of variables. But, the simplification of a Boolean function using K-map becomes very complex for expressions involving five or more variables. Therefore, in actual practice, the K-map is limited to six variables. The number of cells in a K-map depends upon the number of variables in the given Boolean function. A K-map will have 2n cells or squares, where n is the number of variables in the Boolean expression. Therefore, for a two variable function, the K-map will have 22 = 4 cells, for a three variable Boolean function, the K-map will have 23 = 8 cells, and for four variable Boolean function, the K-map will have 24 = 16 cells, and so on. Here, we will discuss five variable K-Map and will use it to simplify Boolean functions in 5 variables. So let’s start with the introduction of 5 variable K-map. Five Variable K-Map A five variable K-map is used to minimize a 5-variable Boolean expression to its reduced form. The following are the important characteristics of a 5 variable K-map − A five variable K-map have 32 (25) cells or squares, and each cell of the K-map represents either a minterm or a maxterm of the Boolean expression. If the given Boolean function is expressed in SOP (Sum of Products) form, then the minterms of five variables Boolean function are designated as m0,m1,m2,m3 … m31. Where, m0 is corresponding to $\mathrm{\lgroup \overline{A} \: \overline{B} \: \overline{C} \: \overline{D} \: \overline{E} \rgroup}$, m1 is corresponding to $\mathrm{\lgroup \overline{A} \: \overline{B} \: \overline{C} \: \overline{D} E \rgroup}$,… and m31 is corresponding to $\mathrm{\lgroup ABCDE \rgroup}$. On the other hand, if the 5 variable Boolean function is expressed in POS (Product of Sums) form, then the maxterms of the function are designated as M0, M1, M2,… M31. Where, M0 represents $$\mathrm{\lgroup A \: + \: B \: + \: C \: + \: D \: + \: E \rgroup}$$ M1 represents $$\mathrm{\lgroup A \: + \: B \: + \: C \: + \: D \: + \: \overline{E} \rgroup}$$ M31 represents $$\mathrm{\lgroup \overline{A} \: + \: \overline{B} \: + \: \overline{C} \: + \: \overline{D} \: + \: \overline{E} \rgroup}$$. The 32 cells of the five variable K-map are divided into two blocks of 16 cells each, which are arranged side by side. The left block represents minterms (or maxterms) from m0 to m15 (or M0 to M15. Wheck, thck, th). In the left block, the first variable (let A) is a 0. The right block represents minterms (or maxterms) from m16 to m31 (or M16 to M31), in this block A is a 1. In the five variable K-map, we can form 2-squares, 4-squares, 8-squares, 16-squares, or 32-squares by involving its two blocks. Also, squares are considered adjacent in these two blocks, when one block superimposes on the top of another. A five variable SOP K-map is shown in Figure 1. A five variable POS K-map is represented in Figure 2. Now, let us discuss some solved examples to understand the application of a 5 variable K map in reducing a given 5-variable Boolean function in either SOP form or POS form. Example 1 Reduce the following 5 variable Boolean function in SOP form using the five variable K map. $$\mathrm{f \lgroup A,B,C,D,E \rgroup \: = \: \sum \: m \lgroup 0,1,2,4,7,8,12,14,15,16,17,18,20,24,28,30,31 \rgroup }$$ Solution The SOP K-map representation of the given SOP Boolean function is shown in Figure 3. Explanation The minimization of the given 5 variable Boolean function using the five variable K-map (Figure 3) is done as per the following steps − There are no isolated 1s in the K-map. The minterm m0 can form an 8-square with m4, m8, m12, m16, m20, m24, and m28. So make it and read it as − $$\mathrm{\lgroup \overline{D} \: \overline{E} \rgroup} $$ The minterms m0, m1, m16, and m17 form a 4-square. Make it and read it as − $$\mathrm{\lgroup \overline{B} \: \overline{C} \: \overline{D} \rgroup} $$ The minterms m0, m2, m16, and m18 form a 4-square. Make it and read it as − $$\mathrm{\lgroup \overline{B} \: \overline{C} \: \overline{E} \rgroup}$$ The minterms m7 and m15 form a 2-square. Make it and read it as − $$\mathrm{\lgroup \overline{A}CDE \rgroup} $$ The minterms m14, m15, m30 and m31 form a 4-square. Make it and read it as − $$\mathrm{\lgroup BCD \rgroup} $$ Finally, write all the product terms in SOP form. Hence, the minimal SOP expression of the given 5 variable Boolean function is, $$\mathrm{f(A,B,C,D,E) \ = \: \overline{A}CDE \: + \: \overline{B} \: overline{C} \: \overline{D} \: + \: \overline{B} \: \overline{C} \: \overline{E} \: + \: BCD \: + \: \overline{D} \: \overline{E}}$$ Example 2 Minimize the following 5 variable Boolean function in POS form using the five variable K map. $$\mathrm{f \lgroup A,B,C,D,E \rgroup \: = \: \prod \: M \lgroup 3,5,6,9,10,11,13,19,21,22,23,25,26,27,29 \rgroup}$$ Solution The POS K-map representation of the given POS Boolean function is shown in Figure 4. Explanation The minimization of the given 5 variable Boolean function using the five variable K-map (figure-4) is done as per the following steps − There are no isolated zeros in the K-map. The maxterms M9, M13, M25, and M29 form a 4 – square. Make

Hexadecimal Arithmetic

Digital Electronics – Hexadecimal Arithmetic ”; Previous Next What is Hexadecimal Arithmetic? In digital electronics, hexadecimal numbers are used to represent binary information in more compact form, as one hexadecimal digit can represent a group of 4 binary digits. Therefore, hexadecimal numbers and arithmetic operation on them play a vital role in the field of digital electronics. Hexadecimal arithmetic is a mathematical system that allows to perform arithmetic operations such as addition, subtraction, multiplication, and division of hexadecimal or base-16 numbers. In this chapter, we will cover the following four basic hexadecimal arithmetic operations − Hexadecimal Addition Hexadecimal Subtraction Hexadecimal Multiplication Hexadecimal Division Let’s understand each of the hexadecimal arithmetic operations in detail with the help of examples. Hexadecimal Addition Hexadecimal addition is one of the basic arithmetic operations performed on hexadecimal numbers to determine their sum. Basically, hexadecimal addition is similar to decimal addition. But in hexadecimal addition, a carry is generated to the next higher column if the sum is greater than or equal to 16. Let us see some solved examples to better understand the hexadecimal addition. Example 1 Add (5A)16 and (BF)16. Solution The addition of the given hexadecimal numbers is shown below − (5A)16 + (BF)16 = (119)16 Explanation Start by adding the hexadecimal digits in the rightmost column: A + F = 10 + 15 = 25 = 16 + 9. Here, 16 forms a carry to the next column. Thus, the sum is 9 with a 1 as carry to the next column. Move to the next column and add the digits along with carry: 5 + B + 1 = 5 + 11 + 1 = 17 = 16 + 1. Here, 16 forms a carry to the next column. Thus, the sum is 1 with a carry 1. There are no digits left, hence carry will also be written as leftmost digit in the sum. So, the hexadecimal sum of 5A and BF is 119. Example 2 Add (ABC)16 and (2A9)16. Solution The hexadecimal sum of given numbers is shown below − (ABC)16 + (2A9)16 = (D65)16 Explanation Start by adding the digits in the rightmost column: C + 9 = 12 + 9 = 21 = 16 + 1. Here, 16 forms a carry. Thus, the sum is 1 with a carry 1. Move to the next column and add the digits along with the carry from the previous step: B + A + 1 = 11 + 10 + 1 = 22 = 16 + 6. Thus, the sum is 6 with a carry 1 to the next column. Move to the leftmost column and add the digits along with the carry from the previous step: A + 2 + 1 = 10 + 2 + 1 = 13. Since, the sum is 13 which is less than 16, hence no carry is generated. In hexadecimal number system, 13 is represented by the letter D. Hence, the hexadecimal sum of ABC and 2A9 = D65. This is all about hexadecimal addition that involves the addition of digits of the given hexadecimal numbers column by column. The most important point to keep in mind while performing hexadecimal addition is that a carry is generated to the next column when the sum in a particular column is greater than or equal to 16, i.e., base of the hexadecimal number system. Hexadecimal Subtraction Hexadecimal subtraction is a basic arithmetic operation performed on hexadecimal numbers to determine the difference between them. Hexadecimal subtraction is similar to decimal subtraction. The only difference is that in hexadecimal subtraction, when the minuend digit is smaller than the subtrahend digit, a borrow 1, which is equivalent to 16, is taken from the higher column digit. Let us understand the hexadecimal subtraction with the help of solved examples. Example 1 Subtract (125)16 from (A57)16. Solution The subtraction of given hexadecimal numbers is given below − (A57)16 – (125)16 = (932)16 Explanation Start subtracting the hexadecimal digits from rightmost column: 7 – 5 = 2. Write down the result. Move to the next column and subtract the digits: 5 – 2 = 3. Write down the digit 3 as difference. Move to the leftmost column and subtract the digits: A – 1 = 10 – 1 = 9. Write down the result as difference. So, the hexadecimal difference of A57 and 125 is 932. Example 2 Subtract (1DA)16 from (BC5)16. Solution The hexadecimal subtraction of BC5 and 1DA is shown below − (BC5)16 – (1DA)16 = (9EB)16 Explanation Start by subtracting from the digits in rightmost column: 5 – A. Since 5 is less than A (10), so we have to borrow from the next higher-order digit. After borrowing from the next column (C), the digit 5 will become 5 + 16 (as 16 is equivalent to borrow 1) = 21. Thus, 21 – A = 11 (B). Write down B as the difference. Move to the next column and subtract the digits: B – D. Again, B is smaller than D, so we take a borrow from the higher order digit B. After getting a borrow, B will become B + 16 = 27. Thus, 27 – D = 14 (E). Write down the digit E as difference. Move to the leftmost column and subtract the digits: A – 1 = 9. Write down the result. Hence, the hexadecimal difference of BC5 and 1DA is equal to 9EB. These examples explain the process of subtracting two hexadecimal numbers. Let us now discuss the third basic arithmetic operation on hexadecimal numbers i.e., hexadecimal multiplications. Hexadecimal Multiplication Hexadecimal multiplication

Threshold Logic

Digital Electronics – Threshold Logic ”; Previous Next In previous chapters, we have implemented various combinational circuits using logic gates. Except NOT gate, the remaining all logic gates have at least two inputs and single output. Similarly, the threshold gate also contains at least one input and only one output. Additionally, it contains the respective weights to each input and a threshold value. The values of these weights and threshold could be of any finite real number. Basics of Threshold gate Let the inputs of threshold gate are X1, X2,X3,…, Xn. The corresponding weights of these inputs are W1, W2,W3, …, Wn. The symbol of Threshold gate is shown in the following figure. Threshold gate is represented with a circle and it is having ”n” inputs, X1 to Xn and single output, Y. This circle is made into two parts. One part represents the weights corresponding to the inputs and other part represents Threshold value, T. The sum of products of inputs with corresponding weights is known as weighted sum. If this weighted sum is greater than or equal to Threshold value, T then only the output, Y will be equal to one. Otherwise, the output, Y will be equal to zero. Mathematically, we can write this relationship between inputs and output of Threshold gate as below. $$\mathrm{Y \: = \: 1 \:\: if \: \: W_{1}X_{1} \: + \: W_{2}X_{2} \: + \: W_{3}X_{3} \: + \: \dotso \: + \: W_{n}X_{n} \: \geq \: T}$$ 𝑌 = 0, otherwise. Therefore, we can implement various logic gates and Boolean functions just by changing the values of weights and / or Threshold value, T. Example Let us find the simplified Boolean function for the following Threshold gate. This Threshold gate is having three inputs X1, X2, X3 and one output Y. The weights corresponding to the inputs X1, X2 & X3 are W1 = 2, W2 = 1 & W3 = -4 respectively. The value of Threshold gate is T = -1. The weighted sum of Threshold gate is $$\mathrm{W \: = \: W_{1}X_{1} \: + \: W_{2}X_{2} \: + \: W_{3}X_{3}}$$ Substitute the given weights in the above equation. $$\mathrm{\Rightarrow \: W \: = \: 2X_{1} \: + \: X_{2} \: − \: 4X_{3}}$$ Output of Threshold gate, Y will be ”1” if W ≥ −1, otherwise it will be ”0”. The following table shows the relationship between the input and output for all possible combination of inputs. Input Weighted Sum Output X1 X2 X3 W = 2X1 + X2 – 4X3 Y 0 0 0 0 1 0 0 1 -4 0 0 1 0 1 1 0 1 1 -3 0 1 0 0 2 1 1 0 1 -2 0 1 1 0 3 1 1 1 1 -1 1 From the above table, we can write the Boolean function for output, Y as $$\mathrm{Y \: = \: \sum m( 0,2,4,6,7)}$$ The simplification of this Boolean function using 3 variable K-Map is shown in the following figure. Therefore, the simplified Boolean function for given Threshold gate is Y = X3” + X1 X2. Synthesis of Threshold Functions Threshold gate is also called as universal gate because we can implement any Boolean function using Threshold gate(s). Some-times, it may not possible to implement few logic gates and Boolean functions by using single Threshold gate. In that case, we may require multiple Threshold gates. Follow these steps for implementing a Boolean function using single Threshold gate. Step 1 − Formulate a Truth table for given Boolean function. Step 2 − In the above Truth table, add (include) one more column, which gives the relation between weighted sums and Threshold value. Step 3 − Write the relation between weighted sums and threshold for each combination of inputs as mentioned below. If the output of Boolean function is 1, then the weighted sum will be greater than or equal to Threshold value for those combination of inputs. If the output of Boolean function is 0, then the weighted sum will be less than Threshold value for those combination of inputs. Step 4 − Choose the values of weights & Threshold in such a way that they should satisfy all the relations present in last column of the above table. Step 5 − Draw the symbol of Threshold gate with those weights and Threshold value. Example Let us implement the following Boolean function using single Threshold gate. $$\mathrm{Y( X_{1},X_{2},X_{3})\:=\: \sum m ( 0,2,4,6,7)}$$ The given Boolean function is a three variable function, which is represented in sum of min terms form. The Truth table of this function is shown below. Input Output X1 X2 X3 Y 0 0 0 1 0 0 1 0 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 0 1 1 0 1 1 1 1 1 Now, let us add (include) one more column

Digital Arithmetic Circuits

Digital Arithmetic Circuits ”; Previous Next In this chapter, let us discuss about the basic arithmetic circuits like Binary adder and Binary subtractor. These circuits can be operated with binary values 0 and 1. Binary Adder The most basic arithmetic operation is addition. The circuit, which performs the addition of two binary numbers is known as Binary adder. First, let us implement an adder, which performs the addition of two bits. Half Adder Half adder is a combinational circuit, which performs the addition of two binary numbers A and B are of single bit. It produces two outputs sum, S & carry, C. The Truth table of Half adder is shown below. Inputs Outputs A B C S 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0 When we do the addition of two bits, the resultant sum can have the values ranging from 0 to 2 in decimal. We can represent the decimal digits 0 and 1 with single bit in binary. But, we can’t represent decimal digit 2 with single bit in binary. So, we require two bits for representing it in binary. Let, sum, S is the Least significant bit and carry, C is the Most significant bit of the resultant sum. For first three combinations of inputs, carry, C is zero and the value of S will be either zero or one based on the number of ones present at the inputs. But, for last combination of inputs, carry, C is one and sum, S is zero, since the resultant sum is two. From Truth table, we can directly write the Boolean functions for each output as $$\mathrm{S \: = \: A \: \oplus \: B}$$ $$\mathrm{C \: = \: AB}$$ We can implement the above functions with 2-input Ex-OR gate & 2-input AND gate. The circuit diagram of Half adder is shown in the following figure. In the above circuit, a two input Ex-OR gate & two input AND gate produces sum, S & carry, C respectively. Therefore, Half-adder performs the addition of two bits. Full Adder Full adder is a combinational circuit, which performs the addition of three bits A, B and Cin. Where, A & B are the two parallel significant bits and Cin is the carry bit, which is generated from previous stage. This Full adder also produces two outputs sum, S & carry, Cout, which are similar to Half adder. The Truth table of Full adder is shown below. Inputs Outputs A B Cin Cout S 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 When we do the addition of three bits, the resultant sum can have the values ranging from 0 to 3 in decimal. We can represent the decimal digits 0 and 1 with single bit in binary. But, we can’t represent the decimal digits 2 and 3 with single bit in binary. So, we require two bits for representing those two decimal digits in binary. Let, sum, S is the Least significant bit and carry, Cout is the Most significant bit of resultant sum. It is easy to fill the values of outputs for all combinations of inputs in the truth table. Just count the number of ones present at the inputs and write the equivalent binary number at outputs. If Cin is equal to zero, then Full adder truth table is same as that of Half adder truth table. We will get the following Boolean functions for each output after simplification. $$\mathrm{S \: = \: A \: \oplus \: B \: \oplus \: C_{in}}$$ $$\mathrm{c_{out} \: = \: AB \: + \: \left ( A \: \oplus \: B \right ) \: c_{in}}$$ The sum, S is equal to one, when odd number of ones present at the inputs. We know that Ex-OR gate produces an output, which is an odd function. So, we can use either two 2input Ex-OR gates or one 3-input Ex-OR gate in order to produce sum, S. We can implement carry, Cout using two 2-input AND gates & one OR gate. The circuit diagram of Full adder is shown in the following figure. This adder is called as Full adder because for implementing one Full adder, we require two Half adders and one OR gate. If Cin is zero, then Full adder becomes Half adder. We can verify it easily from the above circuit diagram or from the Boolean functions of outputs of Full adder. 4-bit Binary Adder The 4-bit binary adder performs the addition of two 4-bit numbers. Let the 4-bit binary numbers, $\mathrm{A \: = \: A_{3}A_{2}A_{1}A_{0}}$ and $\mathrm{B \: = \: B_{3}B_{2}B_{1}B_{0}}$. We can implement 4-bit binary adder in one of the two following ways. Use one Half adder for doing the addition of two Least significant bits and three Full adders for doing the addition of three higher significant bits. Use four Full adders for uniformity. Since, initial carry Cin is zero, the Full