Category: digital Circuits

Error Detection & Correction Codes ”; Previous Next We know that the bits 0 and 1 corresponding to two different range of analog voltages. So, during transmission of binary data from one system to the other, the noise may also be added. Due to this, there may be errors in the received data at other system. That means a bit 0 may change to 1 or a bit 1 may change to 0. We can’t avoid the interference of noise. But, we can get back the original data first by detecting whether any error(s) present and then correcting those errors. For this purpose, we can use the following codes. Error detection codes Error correction codes Error detection codes − are used to detect the error(s) present in the received data (bit stream). These codes contain some bit(s), which are included (appended) to the original bit stream. These codes detect the error, if it is occurred during transmission of the original data (bit stream).Example − Parity code, Hamming code. Error correction codes − are used to correct the error(s) present in the received data (bit stream) so that, we will get the original data. Error correction codes also use the similar strategy of error detection codes.Example − Hamming code. Therefore, to detect and correct the errors, additional bit(s) are appended to the data bits at the time of transmission. Parity Code It is easy to include (append) one parity bit either to the left of MSB or to the right of LSB of original bit stream. There are two types of parity codes, namely even parity code and odd parity code based on the type of parity being chosen. Even Parity Code The value of even parity bit should be zero, if even number of ones present in the binary code. Otherwise, it should be one. So that, even number of ones present in even parity code. Even parity code contains the data bits and even parity bit. The following table shows the even parity codes corresponding to each 3-bit binary code. Here, the even parity bit is included to the right of LSB of binary code. Binary Code Even Parity bit Even Parity Code 000 0 0000 001 1 0011 010 1 0101 011 0 0110 100 1 1001 101 0 1010 110 0 1100 111 1 1111 Here, the number of bits present in the even parity codes is 4. So, the possible even number of ones in these even parity codes are 0, 2 & 4. If the other system receives one of these even parity codes, then there is no error in the received data. The bits other than even parity bit are same as that of binary code. If the other system receives other than even parity codes, then there will be an error(s) in the received data. In this case, we can’t predict the original binary code because we don’t know the bit position(s) of error. Therefore, even parity bit is useful only for detection of error in the received parity code. But, it is not sufficient to correct the error. Odd Parity Code The value of odd parity bit should be zero, if odd number of ones present in the binary code. Otherwise, it should be one. So that, odd number of ones present in odd parity code. Odd parity code contains the data bits and odd parity bit. The following table shows the odd parity codes corresponding to each 3-bit binary code. Here, the odd parity bit is included to the right of LSB of binary code. Binary Code Odd Parity bit Odd Parity Code 000 1 0001 001 0 0010 010 0 0100 011 1 0111 100 0 1000 101 1 1011 110 1 1101 111 0 1110 Here, the number of bits present in the odd parity codes is 4. So, the possible odd number of ones in these odd parity codes are 1 & 3. If the other system receives one of these odd parity codes, then there is no error in the received data. The bits other than odd parity bit are same as that of binary code. If the other system receives other than odd parity codes, then there is an error(s) in the received data. In this case, we can’t predict the original binary code because we don’t know the bit position(s) of error. Therefore, odd parity bit is useful only for detection of error in the received parity code. But, it is not sufficient to correct the error. Hamming Code Hamming code is useful for both detection and correction of error present in the received data. This code uses multiple parity bits and we have to place these parity bits in the positions of powers of 2. The minimum value of ”k” for which the following relation is correct (valid) is nothing but the required number of parity bits. $$2^kgeq n+k+1$$ Where, ‘n’ is the number of bits in the binary code (information) ‘k’ is the number of parity bits Therefore, the number of bits in the Hamming code is equal to n + k. Let the Hamming code is $b_{n+k}b_{n+k-1}…..b_{3}b_{2}b_{1}$ & parity bits $p_{k}, p_{k-1}, ….p_{1}$. We can place the ‘k’ parity bits in powers of 2 positions only. In remaining bit positions, we can place the ‘n’ bits of binary code. Based on requirement, we can use either even parity or odd parity while forming a Hamming code. But, the same parity technique should be used in order to find whether any error present in the received data. Follow this procedure for finding parity bits. Find the value of p1, based on the number of ones present in bit positions b3, b5, b7 and so on. All these bit positions (suffixes) in their equivalent binary have ‘1’ in the place value of 20. Find the value of p2, based on the number of ones present in bit positions b3, b6, b7 and so on. All these bit positions (suffixes) in

Digital Circuits – Conversion of Flip-Flops ”; Previous Next In previous chapter, we discussed the four flip-flops, namely SR flip-flop, D flip-flop, JK flip-flop & T flip-flop. We can convert one flip-flop into the remaining three flip-flops by including some additional logic. So, there will be total of twelve flip-flop conversions. Follow these steps for converting one flip-flop to the other. Consider the characteristic table of desired flip-flop. Fill the excitation values (inputs) of given flip-flop for each combination of present state and next state. The excitation table for all flip-flops is shown below. Present State Next State SR flip-flop inputs D flip-flop input JK flip-flop inputs T flip-flop input Q(t) Q(t+1) S R D J K T 0 0 0 x 0 0 x 0 0 1 1 0 1 1 x 1 1 0 0 1 0 x 1 1 1 1 x 0 1 x 0 0 Get the simplified expressions for each excitation input. If necessary, use Kmaps for simplifying. Draw the circuit diagram of desired flip-flop according to the simplified expressions using given flip-flop and necessary logic gates. Now, let us convert few flip-flops into other. Follow the same process for remaining flipflop conversions. SR Flip-Flop to other Flip-Flop Conversions Following are the three possible conversions of SR flip-flop to other flip-flops. SR flip-flop to D flip-flop SR flip-flop to JK flip-flop SR flip-flop to T flip-flop SR flip-flop to D flip-flop conversion Here, the given flip-flop is SR flip-flop and the desired flip-flop is D flip-flop. Therefore, consider the following characteristic table of D flip-flop. D flip-flop input Present State Next State D Q(t) Q(t + 1) 0 0 0 0 1 0 1 0 1 1 1 1 We know that SR flip-flop has two inputs S & R. So, write down the excitation values of SR flip-flop for each combination of present state and next state values. The following table shows the characteristic table of D flip-flop along with the excitation inputs of SR flip-flop. D flip-flop input Present State Next State SR flip-flop inputs D Q(t) Q(t + 1) S R 0 0 0 0 x 0 1 0 0 1 1 0 1 1 0 1 1 1 x 0 From the above table, we can write the Boolean functions for each input as below. $$S=m_{2}+d_{3}$$ $$R=m_{1}+d_{0}$$ We can use 2 variable K-Maps for getting simplified expressions for these inputs. The k-Maps for S & R are shown below. So, we got S = D & R = D” after simplifying. The circuit diagram of D flip-flop is shown in the following figure. This circuit consists of SR flip-flop and an inverter. This inverter produces an output, which is complement of input, D. So, the overall circuit has single input, D and two outputs Q(t) & Q(t)”. Hence, it is a D flip-flop. Similarly, you can do other two conversions. D Flip-Flop to other Flip-Flop Conversions Following are the three possible conversions of D flip-flop to other flip-flops. D flip-flop to T flip-flop D flip-flop to SR flip-flop D flip-flop to JK flip-flop D flip-flop to T flip-flop conversion Here, the given flip-flop is D flip-flop and the desired flip-flop is T flip-flop. Therefore, consider the following characteristic table of T flip-flop. T flip-flop input Present State Next State T Q(t) Q(t + 1) 0 0 0 0 1 1 1 0 1 1 1 0 We know that D flip-flop has single input D. So, write down the excitation values of D flip-flop for each combination of present state and next state values. The following table shows the characteristic table of T flip-flop along with the excitation input of D flip-flop. T flip-flop input Present State Next State D flip-flop input T Q(t) Q(t + 1) D 0 0 0 0 0 1 1 1 1 0 1 1 1 1 0 0 From the above table, we can directly write the Boolean function of D as below. $$D=Toplus Qleft ( t right )$$ So, we require a two input Exclusive-OR gate along with D flip-flop. The circuit diagram of T flip-flop is shown in the following figure. This circuit consists of D flip-flop and an Exclusive-OR gate. This Exclusive-OR gate produces an output, which is Ex-OR of T and Q(t). So, the overall circuit has single input, T and two outputs Q(t) & Q(t)’. Hence, it is a T flip-flop. Similarly, you can do other two conversions. JK Flip-Flop to other Flip-Flop Conversions Following are the three possible conversions of JK flip-flop to other flip-flops. JK flip-flop to T flip-flop JK flip-flop to D flip-flop JK flip-flop to SR flip-flop JK flip-flop to T flip-flop conversion Here, the given flip-flop is JK flip-flop and the desired flip-flop is T flip-flop. Therefore, consider the following characteristic table of T flip-flop. T flip-flop input Present State Next State T Q(t) Q(t + 1) 0 0 0 0 1 1 1 0 1 1 1 0 We know that JK flip-flop has two inputs J & K. So, write down the excitation values of JK flip-flop for each combination of present state and next state values. The following table shows the characteristic table of T flip-flop along with the excitation inputs of JK flipflop. T flip-flop input Present State Next State JK flip-flop inputs T Q(t) Q(t + 1) J K 0 0 0 0 x 0 1 1 x 0 1 0 1 1 x 1 1 0 x 1 From the above table, we can write the Boolean functions for each input as below. $$J=m_{2}+d_{1}+d_{3}$$ $$K=m_{3}+d_{0}+d_{2}$$ We can use 2 variable K-Maps for getting simplified expressions for these two inputs. The k-Maps for J & K are shown below. So, we got, J = T & K = T after simplifying. The circuit diagram of T flip-flop is shown in the following figure. This circuit consists of JK flip-flop only. It doesn’t require any other gates. Just connect the same input T to both J

Digital Circuits – Finite State Machines ”; Previous Next We know that synchronous sequential circuits change (affect) their states for every positive (or negative) transition of the clock signal based on the input. So, this behavior of synchronous sequential circuits can be represented in the graphical form and it is known as state diagram. A synchronous sequential circuit is also called as Finite State Machine (FSM), if it has finite number of states. There are two types of FSMs. Mealy State Machine Moore State Machine Now, let us discuss about these two state machines one by one. Mealy State Machine A Finite State Machine is said to be Mealy state machine, if outputs depend on both present inputs & present states. The block diagram of Mealy state machine is shown in the following figure. As shown in figure, there are two parts present in Mealy state machine. Those are combinational logic and memory. Memory is useful to provide some or part of previous outputs (present states) as inputs of combinational logic. So, based on the present inputs and present states, the Mealy state machine produces outputs. Therefore, the outputs will be valid only at positive (or negative) transition of the clock signal. The state diagram of Mealy state machine is shown in the following figure. In the above figure, there are three states, namely A, B & C. These states are labelled inside the circles & each circle corresponds to one state. Transitions between these states are represented with directed lines. Here, 0 / 0, 1 / 0 & 1 / 1 denotes input / output. In the above figure, there are two transitions from each state based on the value of input, x. In general, the number of states required in Mealy state machine is less than or equal to the number of states required in Moore state machine. There is an equivalent Moore state machine for each Mealy state machine. Moore State Machine A Finite State Machine is said to be Moore state machine, if outputs depend only on present states. The block diagram of Moore state machine is shown in the following figure. As shown in figure, there are two parts present in Moore state machine. Those are combinational logic and memory. In this case, the present inputs and present states determine the next states. So, based on next states, Moore state machine produces the outputs. Therefore, the outputs will be valid only after transition of the state. The state diagram of Moore state machine is shown in the following figure. In the above figure, there are four states, namely A, B, C & D. These states and the respective outputs are labelled inside the circles. Here, only the input value is labeled on each transition. In the above figure, there are two transitions from each state based on the value of input, x. In general, the number of states required in Moore state machine is more than or equal to the number of states required in Mealy state machine. There is an equivalent Mealy state machine for each Moore state machine. So, based on the requirement we can use one of them. Print Page Previous Next Advertisements ”;

Digital Circuits – Decoders ”; Previous Next Decoder is a combinational circuit that has ‘n’ input lines and maximum of 2n output lines. One of these outputs will be active High based on the combination of inputs present, when the decoder is enabled. That means decoder detects a particular code. The outputs of the decoder are nothing but the min terms of ‘n’ input variables (lines), when it is enabled. 2 to 4 Decoder Let 2 to 4 Decoder has two inputs A1 & A0 and four outputs Y3, Y2, Y1 & Y0. The block diagram of 2 to 4 decoder is shown in the following figure. One of these four outputs will be ‘1’ for each combination of inputs when enable, E is ‘1’. The Truth table of 2 to 4 decoder is shown below. Enable Inputs Outputs E A1 A0 Y3 Y2 Y1 Y0 0 x x 0 0 0 0 1 0 0 0 0 0 1 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 1 1 1 0 0 0 From Truth table, we can write the Boolean functions for each output as $$Y_{3}=E.A_{1}.A_{0}$$ $$ Y_{2}=E.A_{1}.{A_{0}}”$$ $$ Y_{1}=E.{A_{1}}”.A_{0}$$ $$ Y_{0}=E.{A_{1}}”.{A_{0}}”$$ Each output is having one product term. So, there are four product terms in total. We can implement these four product terms by using four AND gates having three inputs each & two inverters. The circuit diagram of 2 to 4 decoder is shown in the following figure. Therefore, the outputs of 2 to 4 decoder are nothing but the min terms of two input variables A1 & A0, when enable, E is equal to one. If enable, E is zero, then all the outputs of decoder will be equal to zero. Similarly, 3 to 8 decoder produces eight min terms of three input variables A2, A1 & A0 and 4 to 16 decoder produces sixteen min terms of four input variables A3, A2, A1 & A0. Implementation of Higher-order Decoders Now, let us implement the following two higher-order decoders using lower-order decoders. 3 to 8 decoder 4 to 16 decoder 3 to 8 Decoder In this section, let us implement 3 to 8 decoder using 2 to 4 decoders. We know that 2 to 4 Decoder has two inputs, A1 & A0 and four outputs, Y3 to Y0. Whereas, 3 to 8 Decoder has three inputs A2, A1 & A0 and eight outputs, Y7 to Y0. We can find the number of lower order decoders required for implementing higher order decoder using the following formula. $$Required : number : of : lower : order : decoders=frac{m_{2}}{m_{1}}$$ Where, $m_{1}$ is the number of outputs of lower order decoder. $m_{2}$ is the number of outputs of higher order decoder. Here, $m_{1}$ = 4 and $m_{2}$ = 8. Substitute, these two values in the above formula. $$Required : number : of : 2 : to : 4 : decoders=frac{8}{4}=2$$ Therefore, we require two 2 to 4 decoders for implementing one 3 to 8 decoder. The block diagram of 3 to 8 decoder using 2 to 4 decoders is shown in the following figure. The parallel inputs A1 & A0 are applied to each 2 to 4 decoder. The complement of input A2 is connected to Enable, E of lower 2 to 4 decoder in order to get the outputs, Y3 to Y0. These are the lower four min terms. The input, A2 is directly connected to Enable, E of upper 2 to 4 decoder in order to get the outputs, Y7 to Y4. These are the higher four min terms. 4 to 16 Decoder In this section, let us implement 4 to 16 decoder using 3 to 8 decoders. We know that 3 to 8 Decoder has three inputs A2, A1 & A0 and eight outputs, Y7 to Y0. Whereas, 4 to 16 Decoder has four inputs A3, A2, A1 & A0 and sixteen outputs, Y15 to Y0 We know the following formula for finding the number of lower order decoders required. $$Required : number : of : lower : order : decoders=frac{m_{2}}{m_{1}}$$ Substitute, $m_{1}$ = 8 and $m_{2}$ = 16 in the above formula. $$Required : number : of : 3 : to : 8 decoders=frac{16}{8}=2$$ Therefore, we require two 3 to 8 decoders for implementing one 4 to 16 decoder. The block diagram of 4 to 16 decoder using 3 to 8 decoders is shown in the following figure. The parallel inputs A2, A1 & A0 are applied to each 3 to 8 decoder. The complement of input, A3 is connected to Enable, E of lower 3 to 8 decoder in order to get the outputs, Y7 to Y0. These are the lower eight min terms. The input, A3 is directly connected to Enable, E of upper 3 to 8 decoder in order to get the outputs, Y15 to Y8. These are the higher eight min terms. Print Page Previous Next Advertisements ”;

Digital Circuits – Base Conversions ”; Previous Next In previous chapter, we have seen the four prominent number systems. In this chapter, let us convert the numbers from one number system to the other in order to find the equivalent value. Decimal Number to other Bases Conversion If the decimal number contains both integer part and fractional part, then convert both the parts of decimal number into other base individually. Follow these steps for converting the decimal number into its equivalent number of any base ‘r’. Do division of integer part of decimal number and successive quotients with base ‘r’ and note down the remainders till the quotient is zero. Consider the remainders in reverse order to get the integer part of equivalent number of base ‘r’. That means, first and last remainders denote the least significant digit and most significant digit respectively. Do multiplication of fractional part of decimal number and successive fractions with base ‘r’ and note down the carry till the result is zero or the desired number of equivalent digits is obtained. Consider the normal sequence of carry in order to get the fractional part of equivalent number of base ‘r’. Decimal to Binary Conversion The following two types of operations take place, while converting decimal number into its equivalent binary number. Division of integer part and successive quotients with base 2. Multiplication of fractional part and successive fractions with base 2. Example Consider the decimal number 58.25. Here, the integer part is 58 and fractional part is 0.25. Step 1 − Division of 58 and successive quotients with base 2. Operation Quotient Remainder 58/2 29 0 (LSB) 29/2 14 1 14/2 7 0 7/2 3 1 3/2 1 1 1/2 0 1(MSB) ⇒(58)10 = (111010)2 Therefore, the integer part of equivalent binary number is 111010. Step 2 − Multiplication of 0.25 and successive fractions with base 2. Operation Result Carry 0.25 x 2 0.5 0 0.5 x 2 1.0 1 – 0.0 – ⇒(.25)10 = (.01)2 Therefore, the fractional part of equivalent binary number is .01 ⇒(58.25)10 = (111010.01)2 Therefore, the binary equivalent of decimal number 58.25 is 111010.01. Decimal to Octal Conversion The following two types of operations take place, while converting decimal number into its equivalent octal number. Division of integer part and successive quotients with base 8. Multiplication of fractional part and successive fractions with base 8. Example Consider the decimal number 58.25. Here, the integer part is 58 and fractional part is 0.25. Step 1 − Division of 58 and successive quotients with base 8. Operation Quotient Remainder 58/8 7 2 7/8 0 7 ⇒(58)10 = (72)8 Therefore, the integer part of equivalent octal number is 72. Step 2 − Multiplication of 0.25 and successive fractions with base 8. Operation Result Carry 0.25 x 8 2.00 2 – 0.00 – ⇒ (.25)10 = (.2)8 Therefore, the fractional part of equivalent octal number is .2 ⇒ (58.25)10 = (72.2)8 Therefore, the octal equivalent of decimal number 58.25 is 72.2. Decimal to Hexa-Decimal Conversion The following two types of operations take place, while converting decimal number into its equivalent hexa-decimal number. Division of integer part and successive quotients with base 16. Multiplication of fractional part and successive fractions with base 16. Example Consider the decimal number 58.25. Here, the integer part is 58 and decimal part is 0.25. Step 1 − Division of 58 and successive quotients with base 16. Operation Quotient Remainder 58/16 3 10=A 3/16 0 3 ⇒ (58)10 = (3A)16 Therefore, the integer part of equivalent Hexa-decimal number is 3A. Step 2 − Multiplication of 0.25 and successive fractions with base 16. Operation Result Carry 0.25 x 16 4.00 4 – 0.00 – ⇒(.25)10 = (.4)16 Therefore, the fractional part of equivalent Hexa-decimal number is .4. ⇒(58.25)10 = (3A.4)16 Therefore, the Hexa-decimal equivalent of decimal number 58.25 is 3A.4. Binary Number to other Bases Conversion The process of converting a number from binary to decimal is different to the process of converting a binary number to other bases. Now, let us discuss about the conversion of a binary number to decimal, octal and Hexa-decimal number systems one by one. Binary to Decimal Conversion For converting a binary number into its equivalent decimal number, first multiply the bits of binary number with the respective positional weights and then add all those products. Example Consider the binary number 1101.11. Mathematically, we can write it as (1101.11)2 = (1 × 23) + (1 × 22) + (0 × 21) + (1 × 20) + (1 × 2-1) + (1 × 2-2) ⇒ (1101.11)2 = 8 + 4 + 0 + 1 + 0.5 + 0.25 = 13.75 ⇒ (1101.11)2 = (13.75)10 Therefore, the decimal equivalent of binary number 1101.11 is 13.75. Binary to Octal Conversion We know that the bases of binary and octal number systems are 2 and 8 respectively. Three bits of binary number is equivalent to one octal digit, since 23 = 8. Follow these two steps for converting a binary number into its equivalent octal number. Start from the binary point and make the groups of 3 bits on both sides of binary point. If one or two bits are less while making the group of 3 bits, then include required number of zeros on extreme sides. Write the octal digits corresponding to each group of 3 bits. Example Consider the binary number 101110.01101. Step 1 − Make the groups of 3 bits on both sides of binary point. 101 110.011 01 Here, on right side of binary point, the last group is having only 2 bits. So, include one zero on extreme side in order to make it as group of 3 bits. ⇒ 101 110.011 010 Step 2 − Write the octal digits corresponding to each group of 3 bits. ⇒ (101 110.011 010)2 = (56.32)8 Therefore, the octal equivalent of binary number 101110.01101 is 56.32. Binary to Hexa-Decimal Conversion We know that the bases of binary and Hexa-decimal number systems are 2

Digital Circuits – Multiplexers ”; Previous Next Multiplexer is a combinational circuit that has maximum of 2n data inputs, ‘n’ selection lines and single output line. One of these data inputs will be connected to the output based on the values of selection lines. Since there are ‘n’ selection lines, there will be 2n possible combinations of zeros and ones. So, each combination will select only one data input. Multiplexer is also called as Mux. 4×1 Multiplexer 4×1 Multiplexer has four data inputs I3, I2, I1 & I0, two selection lines s1 & s0 and one output Y. The block diagram of 4×1 Multiplexer is shown in the following figure. One of these 4 inputs will be connected to the output based on the combination of inputs present at these two selection lines. Truth table of 4×1 Multiplexer is shown below. Selection Lines Output S1 S0 Y 0 0 I0 0 1 I1 1 0 I2 1 1 I3 From Truth table, we can directly write the Boolean function for output, Y as $$Y={S_{1}}”{S_{0}}”I_{0}+{S_{1}}”S_{0}I_{1}+S_{1}{S_{0}}”I_{2}+S_{1}S_{0}I_{3}$$ We can implement this Boolean function using Inverters, AND gates & OR gate. The circuit diagram of 4×1 multiplexer is shown in the following figure. We can easily understand the operation of the above circuit. Similarly, you can implement 8×1 Multiplexer and 16×1 multiplexer by following the same procedure. Implementation of Higher-order Multiplexers. Now, let us implement the following two higher-order Multiplexers using lower-order Multiplexers. 8×1 Multiplexer 16×1 Multiplexer 8×1 Multiplexer In this section, let us implement 8×1 Multiplexer using 4×1 Multiplexers and 2×1 Multiplexer. We know that 4×1 Multiplexer has 4 data inputs, 2 selection lines and one output. Whereas, 8×1 Multiplexer has 8 data inputs, 3 selection lines and one output. So, we require two 4×1 Multiplexers in first stage in order to get the 8 data inputs. Since, each 4×1 Multiplexer produces one output, we require a 2×1 Multiplexer in second stage by considering the outputs of first stage as inputs and to produce the final output. Let the 8×1 Multiplexer has eight data inputs I7 to I0, three selection lines s2, s1 & s0 and one output Y. The Truth table of 8×1 Multiplexer is shown below. Selection Inputs Output S2 S1 S0 Y 0 0 0 I0 0 0 1 I1 0 1 0 I2 0 1 1 I3 1 0 0 I4 1 0 1 I5 1 1 0 I6 1 1 1 I7 We can implement 8×1 Multiplexer using lower order Multiplexers easily by considering the above Truth table. The block diagram of 8×1 Multiplexer is shown in the following figure. The same selection lines, s1 & s0 are applied to both 4×1 Multiplexers. The data inputs of upper 4×1 Multiplexer are I7 to I4 and the data inputs of lower 4×1 Multiplexer are I3 to I0. Therefore, each 4×1 Multiplexer produces an output based on the values of selection lines, s1 & s0. The outputs of first stage 4×1 Multiplexers are applied as inputs of 2×1 Multiplexer that is present in second stage. The other selection line, s2 is applied to 2×1 Multiplexer. If s2 is zero, then the output of 2×1 Multiplexer will be one of the 4 inputs I3 to I0 based on the values of selection lines s1 & s0. If s2 is one, then the output of 2×1 Multiplexer will be one of the 4 inputs I7 to I4 based on the values of selection lines s1 & s0. Therefore, the overall combination of two 4×1 Multiplexers and one 2×1 Multiplexer performs as one 8×1 Multiplexer. 16×1 Multiplexer In this section, let us implement 16×1 Multiplexer using 8×1 Multiplexers and 2×1 Multiplexer. We know that 8×1 Multiplexer has 8 data inputs, 3 selection lines and one output. Whereas, 16×1 Multiplexer has 16 data inputs, 4 selection lines and one output. So, we require two 8×1 Multiplexers in first stage in order to get the 16 data inputs. Since, each 8×1 Multiplexer produces one output, we require a 2×1 Multiplexer in second stage by considering the outputs of first stage as inputs and to produce the final output. Let the 16×1 Multiplexer has sixteen data inputs I15 to I0, four selection lines s3 to s0 and one output Y. The Truth table of 16×1 Multiplexer is shown below. Selection Inputs Output S3 S2 S1 S0 Y 0 0 0 0 I0 0 0 0 1 I1 0 0 1 0 I2 0 0 1 1 I3 0 1 0 0 I4 0 1 0 1 I5 0 1 1 0 I6 0 1 1 1 I7 1 0 0 0 I8 1 0 0 1 I9 1 0 1 0 I10 1 0 1 1 I11 1 1 0 0 I12 1 1 0 1 I13 1 1 1 0 I14 1 1 1 1 I15 We can implement 16×1 Multiplexer using lower order Multiplexers easily by considering the above Truth table. The block diagram of 16×1 Multiplexer is shown in the following figure. The same selection lines, s2, s1 & s0 are applied to both 8×1 Multiplexers. The data inputs of upper 8×1 Multiplexer are I15 to I8 and the data inputs of lower 8×1 Multiplexer are I7 to I0. Therefore, each 8×1 Multiplexer produces an output based on the values of selection lines, s2, s1 & s0. The outputs of first stage 8×1 Multiplexers are applied as inputs of 2×1 Multiplexer that is present in second stage. The other selection line, s3 is applied to 2×1 Multiplexer. If s3 is zero, then the output of 2×1 Multiplexer will be one of the 8 inputs Is7 to I0 based on the values of selection lines s2, s1 & s0. If s3 is one, then the output of 2×1 Multiplexer will be one of the 8 inputs I15 to I8 based on the values of selection lines s2, s1 & s0. Therefore, the overall combination of two 8×1 Multiplexers and one 2×1 Multiplexer performs as one 16×1 Multiplexer.

Digital Circuits – Number Systems ”; Previous Next If base or radix of a number system is ‘r’, then the numbers present in that number system are ranging from zero to r-1. The total numbers present in that number system is ‘r’. So, we will get various number systems, by choosing the values of radix as greater than or equal to two. In this chapter, let us discuss about the popular number systems and how to represent a number in the respective number system. The following number systems are the most commonly used. Decimal Number system Binary Number system Octal Number system Hexadecimal Number system Decimal Number System The base or radix of Decimal number system is 10. So, the numbers ranging from 0 to 9 are used in this number system. The part of the number that lies to the left of the decimal point is known as integer part. Similarly, the part of the number that lies to the right of the decimal point is known as fractional part. In this number system, the successive positions to the left of the decimal point having weights of 100, 101, 102, 103 and so on. Similarly, the successive positions to the right of the decimal point having weights of 10-1, 10-2, 10-3 and so on. That means, each position has specific weight, which is power of base 10 Example Consider the decimal number 1358.246. Integer part of this number is 1358 and fractional part of this number is 0.246. The digits 8, 5, 3 and 1 have weights of 100, 101, 102 and 103 respectively. Similarly, the digits 2, 4 and 6 have weights of 10-1, 10-2 and 10-3 respectively. Mathematically, we can write it as 1358.246 = (1 × 103) + (3 × 102) + (5 × 101) + (8 × 100) + (2 × 10-1) + (4 × 10-2) + (6 × 10-3) After simplifying the right hand side terms, we will get the decimal number, which is on left hand side. Binary Number System All digital circuits and systems use this binary number system. The base or radix of this number system is 2. So, the numbers 0 and 1 are used in this number system. The part of the number, which lies to the left of the binary point is known as integer part. Similarly, the part of the number, which lies to the right of the binary point is known as fractional part. In this number system, the successive positions to the left of the binary point having weights of 20, 21, 22, 23 and so on. Similarly, the successive positions to the right of the binary point having weights of 2-1, 2-2, 2-3 and so on. That means, each position has specific weight, which is power of base 2. Example Consider the binary number 1101.011. Integer part of this number is 1101 and fractional part of this number is 0.011. The digits 1, 0, 1 and 1 of integer part have weights of 20, 21, 22, 23 respectively. Similarly, the digits 0, 1 and 1 of fractional part have weights of 2-1, 2-2, 2-3 respectively. Mathematically, we can write it as 1101.011 = (1 × 23) + (1 × 22) + (0 × 21) + (1 × 20) + (0 × 2-1) + (1 × 2-2) + (1 × 2-3) After simplifying the right hand side terms, we will get a decimal number, which is an equivalent of binary number on left hand side. Octal Number System The base or radix of octal number system is 8. So, the numbers ranging from 0 to 7 are used in this number system. The part of the number that lies to the left of the octal point is known as integer part. Similarly, the part of the number that lies to the right of the octal point is known as fractional part. In this number system, the successive positions to the left of the octal point having weights of 80, 81, 82, 83 and so on. Similarly, the successive positions to the right of the octal point having weights of 8-1, 8-2, 8-3 and so on. That means, each position has specific weight, which is power of base 8. Example Consider the octal number 1457.236. Integer part of this number is 1457 and fractional part of this number is 0.236. The digits 7, 5, 4 and 1 have weights of 80, 81, 82 and 83 respectively. Similarly, the digits 2, 3 and 6 have weights of 8-1, 8-2, 8-3 respectively. Mathematically, we can write it as 1457.236 = (1 × 83) + (4 × 82) + (5 × 81) + (7 × 80) + (2 × 8-1) + (3 × 8-2) + (6 × 8-3) After simplifying the right hand side terms, we will get a decimal number, which is an equivalent of octal number on left hand side. Hexadecimal Number System The base or radix of Hexa-decimal number system is 16. So, the numbers ranging from 0 to 9 and the letters from A to F are used in this number system. The decimal equivalent of Hexa-decimal digits from A to F are 10 to 15. The part of the number, which lies to the left of the hexadecimal point is known as integer part. Similarly, the part of the number, which lies to the right of the Hexa-decimal point is known as fractional part. In this number system, the successive positions to the left of the Hexa-decimal point having weights of 160, 161, 162, 163 and so on. Similarly, the successive positions to the right of the Hexa-decimal point having weights of 16-1, 16-2, 16-3 and so on. That means, each position has specific weight, which is power of base 16. Example Consider the Hexa-decimal number 1A05.2C4. Integer part of this number is 1A05 and fractional part of this number is 0.2C4. The digits 5, 0, A and 1 have weights of 160, 161, 162 and 163 respectively. Similarly, the

Digital Circuits Tutorial PDF Version Quick Guide Resources Job Search Discussion This tutorial is meant to provide the readers to know how to analyze and implement the combinational circuits and sequential circuits. Based on the requirement, we can use either combinational circuit or sequential circuit or combination of both. After completing this tutorial, you will be able to learn the type of digital circuit, which is suitable for specific application. Audience This tutorial is meant for all the readers who are aspiring to learn the concepts of digital circuits. Digital circuits contain a set of Logic gates and these can be operated with binary values, 0 and 1. Prerequisites A basic idea regarding the initial concepts of Digital Electronics is enough to understand the topics covered in this tutorial. Print Page Previous Next Advertisements ”;